PATTERNING MASK AND METHOD OF FORMATION OF MASK USING STEP DOUBLE PATTERNING

• US 20110217843A1
• Filed: 03/02/2010
• Published: 09/08/2011
• Est. Priority Date: 03/02/2010
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Devilliers, Anton, Hyatt, Michael
• Granted Patent: US 8,153,522 B2
• Time in Patent Office: Days
• US Class Current: 438/675
• CPC Class Codes: G03F 1/00 Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
• CPC Class Codes: G03F 1/70 Adapting basic layout or design of masks to lithographic process requirements, e.g., second iteration correction of mask patterns for imaging
• CPC Class Codes: G03F 7/20 Exposure; Apparatus therefor photographic printing apparatus for making copies G03B27/00
• CPC Class Codes: G03F 7/70466 Multiple exposures, e.g. combination of fine and coarse exposures, double patterning or multiple exposures for printing a single feature stitching G03F7/70475
• CPC Class Codes: H01L 21/0274 Photolithographic processes
• CPC Class Codes: H01L 21/0337 characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
• CPC Class Codes: H01L 21/31144 using masks
• CPC Class Codes: H01L 21/768 Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
• CPC Class Codes: H01L 21/76816 Aspects relating to the layout of the pattern or to the size of vias or trenches layout of the interconnections per se H01L23/528; CAD of ICs G06F30/00
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A method of forming a mask for use in fabricating an integrated circuit includes forming first non-removable portions of a photoresist material through a mask having a plurality of apertures, shifting the mask, forming second non-removable second portions of the photoresist material overlapping the first portions, and removing removable portions of the photoresist material arranged between the first and second portions. The formed photoresist mask may be used to form vias in an integrated circuit. The pattern of vias produced have the capability to exceed the current imaging resolution of a single exposure treatment.

Claims

1. A method of forming an integrated circuit structure, the method comprising:

arranging a mask having a plurality of apertures over a first material;

making first portions of the first material non-removable by exposure through the plurality of apertures;

shifting the mask so that the plurality of apertures overlap a portion of the first portions of the first material; and

making second portions of the first material non-removable by exposure through the plurality of apertures, wherein the first portions and the second portions overlap in such a way so as to produce removable portions of the first material arranged between the first portions and second portions; and

removing the removable portions of the first material.

2. The method of claim 1, further comprising removing the removable portions to form a plurality of openings in the first material.

3. The method of claim 2, further comprising providing a second material below the first material and etching the second material through the openings in the first material to form a plurality of vias in second material.

4. The method of claim 3, further comprising forming electrical connections in the plurality of vias formed in the second material.

5. The method of claim 4, further comprising forming a conductive material over and in contact with at least one of the electrical connections.

6. The method of claim 1, wherein the first material is a photoresist material.

7. The method of claim 6, wherein formation of the first portions of the first material comprises exposing the first portions of the first material to radiation and formation of the second portions of the second material comprises exposing the second portions of the second material to radiation.

8. The method of claim 1, wherein the plurality of apertures are square shaped.

9. The method of claim 8, wherein the plurality of apertures are arranged at a forty-five degree angle to an edge of the mask.

10. The method of claim 8, wherein the plurality of apertures are arranged in a grid.

11. The method of claim 10, wherein the mask is shifted by a distance such that the center of the apertures are aligned at or approximately at locations centered between four first portions.

12. The method of claim 10, wherein the plurality of apertures are arranged such that a pitch of a point of a square shape measured diagonally across the square shape is at or about 1.41 times the pitch of a point of a square shape measured along an edge of the square shape.

13. The method of claim 1, wherein the plurality of apertures are in the shape of a first square overlapped by four smaller squares, wherein each of the smaller square overlaps one of the corners of the first square.

14. The method of claim 13, wherein the plurality of apertures are arranged in a grid.

15. The method of claim 14, wherein the mask is shifted by a distance such that the center of the apertures are aligned at or approximately at locations centered between four cured first portions.

16. The method of claim 14, wherein the plurality of apertures are arranged such that a pitch of a point of a smaller square measured diagonally across the aperture is at or about 1.41 times the pitch of a point of a smaller square measured along an edge of the aperture.

17. A method of forming electrical connections in an integrated circuit, the method comprising:

providing a material to be patterned over a substrate;

providing a photoresist material over the material to be patterned;

providing a mask having a plurality of apertures over the photoresist material;

exposing the photoresist material through the plurality of apertures during a first exposure to form non-removable first portions of the photoresist material;

shifting the mask so that the plurality of apertures overlap a portion of the first portions of the photoresist material;

exposing the photoresist material through the plurality of apertures during a second exposure to form non-removable second portions of the photoresist material;

removing removable portions of the photoresist located between the overlapping first portions and second portions of the photoresist;

etching the material to be patterned through areas previously occupied by the removable portions of the photoresist to form a plurality of openings.

18. The method of claim 17, wherein the openings are vias.

19. The method of claim 18, further comprising filling the vias with conductive material to form a plurality of electrical connections.

20. The method of claim 17, wherein the plurality of apertures comprise square shapes and are arranged in a grid.

21. The method of claim 20, wherein the plurality of apertures are arranged such that a pitch of a point of a square shape measured diagonally across the square shape is 1.41 times the pitch of a point of a square shape measured along an edge of the square shape.

22. The method of claim 20, wherein the plurality of apertures each comprise five overlapping square shapes.

23. A method of forming a mask, comprising:

changing a physical property a first material by irradiating the first material a first time through a mask having a plurality of apertures;

shifting the mask relative to the first material and irradiating the material a second time through the mask to change the physical property of the first material not changed by said first irradiating, and

producing a mask from the first material by removing one of either portions of the first material having a changed physical property or portions of the first material which do not have a changed physical property.

24. The method of claim 23, further comprising removing portions of the first material which do not have a changed physical property.

25. A mask for forming features in an integrated circuit structure, comprising:

a plurality of non-removable first portions arranged in a first pattern;

a plurality of non-removable second portions arranged in the first pattern and overlapping portions of the plurality of first portions; and

a plurality of openings formed through the mask and located between the overlapping cured first portions and second portions.

26. The mask of claim 25, wherein the openings are vias.

27. The mask of claim 25, wherein the plurality of first portions and the plurality of second portions each comprise a square shape.

28. The mask of claim 27, wherein the plurality of first portions and the plurality of second portions are arranged such that a pitch of a point of a square shape measured diagonally across the square shape is at or about 1.41 times the pitch of a point of a square shape measured along an edge of the square shape.

29. The mask of claim 25, wherein the plurality of first portions are arranged in a first grid and the plurality of second portions are arranged in a second grid overlapping and identical to the first grid.