FIELD-EFFECT TRANSISTOR

• US 20110227132A1
• Filed: 05/31/2011
• Published: 09/22/2011
• Est. Priority Date: 12/05/2008
• Status: Abandoned Application

• Current Assignee: Panasonic Corporation (Panasonic Holdings Corporation)
• Original Assignee: Panasonic Corporation (Panasonic Holdings Corporation)
• Inventors: ANDA, Yoshiharu, UEDA, Tetsuzo, ISHIDA, Hidetoshi
• Application Number:
  US13/118,945
• Publication Number:
  US 20110227132A1
• Time in Patent Office: Days
• US Class Current: 257/192
• CPC Class Codes: H01L 29/2003 Nitride compounds
• CPC Class Codes: H01L 29/42316 for field-effect transistors
• CPC Class Codes: H01L 29/4236 within a trench, e.g. trench gate electrode, groove gate electrode
• CPC Class Codes: H01L 29/7787 with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET

Abstract

The present invention has as an object to provide a FET having low on-resistance. The FET according to the present invention includes: first nitride semiconductor layer; a second nitride semiconductor layer formed on the first nitride semiconductor layer and having a higher band gap energy than the first nitride semiconductor layer; a third nitride semiconductor layer formed on the second nitride semiconductor layer; a fourth nitride semiconductor layer formed on the third nitride semiconductor layer and having a higher band gap energy than the third nitride semiconductor layer. A channel is formed in a heterojunction interface between the first nitride semiconductor layer and the second nitride semiconductor layer.

Claims

1. A field-effect transistor, comprising:

a first nitride semiconductor layer;

a second nitride semiconductor layer formed on said first nitride semiconductor layer and having a band gap energy that is higher than a band gap energy of said first nitride semiconductor layer;

a third nitride semiconductor layer formed on said second nitride semiconductor layer; and

a fourth nitride semiconductor layer formed on said third nitride semiconductor layer and having a band gap energy that is higher than a band gap energy of said third nitride semiconductor layer,

wherein a channel is formed in a heterojunction interface between said first nitride semiconductor layer and said second nitride semiconductor layer.

2. The field-effect transistor according to claim 1,

wherein a gate electrode of said field-effect transistor is formed in a recess provided in said fourth nitride semiconductor layer.

3. The field-effect transistor according to claim 2,

wherein said recess penetrates through a heterojunction interface between said third nitride semiconductor layer and said fourth nitride semiconductor layer.

4. The field-effect transistor according to claim 3,

wherein said recess penetrates through the heterojunction interface between said third nitride semiconductor layer and said fourth nitride semiconductor layer, and reaches a surface of said second nitride semiconductor layer, and

the surface of said second nitride semiconductor layer, which is a bottom plane of said recess, is coplanar with as the heterojunction interface between said second nitride semiconductor layer and said third nitride semiconductor layer.

5. The field-effect transistor according to claim 4,

wherein said recess penetrates through said second nitride semiconductor layer, said third nitride semiconductor layer, and said fourth nitride semiconductor layer, and reaches said first nitride semiconductor layer.

6. The field-effect transistor according to claim 2, further comprising

an insulating film formed on a bottom plane of said recess.

7. The field-effect transistor according to claim 2, further comprises:

a fifth nitride semiconductor layer formed on a bottom plane of said recess; and

an insulating film formed between said gate electrode and said fifth nitride semiconductor layer.

8. The field-effect transistor according to claim 7,

wherein said fifth nitride semiconductor layer is made of Al_zGa_1-zN, where 0<

z≦

1.

9. The field-effect transistor according to claim 6,

wherein said insulating film is made of silicon nitride.

10. The field-effect transistor according to claim 6,

wherein said insulating film is configured of a stacked structure of silicon nitride and aluminum nitride.

11. The field-effect transistor according to claim 6,

wherein said insulating film is formed using an atomic layer deposition apparatus.

12. The field-effect transistor according to claim 1,

wherein a film-thickness of said second nitride semiconductor layer is less than a film-thickness of said fourth nitride semiconductor layer.

13. The field-effect transistor according to claim 1,

wherein each of a source electrode and a drain electrode of said field-effect transistor is in contact with the heterojunction interface between said first nitride semiconductor layer and said second nitride semiconductor layer and a heterojunction interface between said third nitride semiconductor layer and said fourth nitride semiconductor layer.

14. The field-effect transistor according to claim 1,

wherein said first nitride semiconductor layer is made of GaN,

said second nitride semiconductor layer is made of Al_xGa_1-xN, where 0<

x≦

1,

said third nitride semiconductor layer is made of GaN, and

said fourth nitride semiconductor layer is made of Al_yGa_1-yN, where 0<

y≦

1.