Loop Transformation for Computer Compiler Optimization
First Claim
1. A method for compiling high level source code, said method comprising:
- translating said high level source code into an intermediate instruction set;
determining a total cycle cost for a loop in said intermediate instruction set;
determining an estimated cycle cost for an equivalent transformed loop having all conversions outside the transformed loop;
comparing said total cycle cost with said estimated cycle cost; and
in response to said total cycle cost exceeding said estimated cycle cost, replacing said loop with said equivalent transformed loop.
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Abstract
A new computer-compiler architecture includes code analysis processes in which loops present in an intermediate instruction set are transformed into more efficient loops prior to fully executing the intermediate instruction set. The compiler architecture starts by generating the equivalent intermediate instructions for the original high level source code. For each loop in the intermediate instructions, a total cycle cost is calculated using a cycle cost table associated with the compiler. The compiler then generates intermediate code for replacement loops in which all conversion instructions are removed. The cycle costs for these new transformed loops are then compared against the total cycle cost for the original loops. If the total cycle costs exceed the new cycle costs, the compiler will replace the original loops in the intermediate instructions with the new transformed loops prior to generation of final code using the instruction set of the processor.
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Citations
20 Claims
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1. A method for compiling high level source code, said method comprising:
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translating said high level source code into an intermediate instruction set; determining a total cycle cost for a loop in said intermediate instruction set; determining an estimated cycle cost for an equivalent transformed loop having all conversions outside the transformed loop; comparing said total cycle cost with said estimated cycle cost; and in response to said total cycle cost exceeding said estimated cycle cost, replacing said loop with said equivalent transformed loop. - View Dependent Claims (2, 3, 4, 5)
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6. A computing device comprising:
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a processor; an input/output (I/O) interface coupled to said processor; a storage memory coupled to said processor; a compiler stored on said storage memory; high level source code stored on said storage memory, wherein, when selected for execution, said processor executes said compiler, said executing compiler configured; to trigger execution of a code generator associated with said compiler, said code generator executed by said processor and configured to generate an intermediate instruction set based on said high level source code; to trigger execution of a cost analyzing module associated with said compiler, said cost analyzing module executed by said processor and configured to determine a total cycle cost for a loop in said intermediate instruction set, wherein said executing cost analyzing module is further configured to determine an estimated cycle cost for an equivalent transformed loop without conversion instructions in the transformed loop; to compare said total cycle cost with said estimated cycle cost; and to replace said loop with said equivalent transformed loop in response to said total cycle cost exceeding said estimated cycle cost. - View Dependent Claims (7, 8, 9)
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10. A computer-readable medium including program code tangibly stored thereon, comprising:
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program code to translate source code into an intermediate instruction set; program code to determine a total cycle cost for a loop in said intermediate instruction set; program code to determine an estimated cycle cost for an equivalent transformed loop without looped conversions; program code to compare said total cycle cost with said estimated cycle cost; and program code, executable in response to said total cycle cost exceeding said estimated cycle cost, to replace said loop with said equivalent transformed loop. - View Dependent Claims (11, 12, 13, 14)
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15. A system for compiling high level source code, said system comprising:
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means for translating said source code into an intermediate instruction set; means for determining a total cycle cost for a loop in said intermediate instruction set; means for determining an estimated cycle cost for an equivalent transformed loop without conversions; means for comparing said total cycle cost with said estimated cycle cost; and means, executable in response to said total cycle cost exceeding said estimated cycle cost, for replacing said loop with said equivalent transformed loop. - View Dependent Claims (16, 17)
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18. A computer compiler integrated circuit (IC) comprising:
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a plurality of functional code modules, said plurality comprising; a compilation module configured to manage compilation of high level source code into executable low level code; a code generator; a cost table; a cost analyzing module; an instruction set architecture (ISA); wherein said plurality of functional code modules are integrated into a single IC; a bus interface coupled to a computer bus, said computer bus enabling communication with a processor for executing said plurality of functional code modules, wherein, when executed by said processor, said compilation module configures said compiler; to trigger execution of said code generator, said code generator executed by said processor and configured to generate an intermediate instruction set using said ISA and based on said high level source code; to trigger execution of said cost analyzing module, said cost analyzing module is executed by said processor and configured to access said cost table and calculate a total cycle cost for a loop in said intermediate instruction set, and to calculate an estimated cycle cost for an equivalent transformed loop generated by said code generator, the equivalent loop omitting conversions; to compare said total cycle cost with said estimated cycle cost; and to replace said loop with said equivalent transformed loop in response to said total cycle cost exceeding said estimated cycle cost. - View Dependent Claims (19, 20)
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Specification