CHARGE PUMP CIRCUIT AND METHODS OF OPERATION THEREOF

• US 20110234305A1
• Filed: 06/02/2011
• Published: 09/29/2011
• Est. Priority Date: 12/22/2006
• Status: Active Grant

• Current Assignee: Cirrus Logic Incorporated
• Original Assignee: John P. Lesso
• Inventors: Lesso, John P.
• Granted Patent: US 8,427,851 B2
• Time in Patent Office: Days
• US Class Current: 327/536
• CPC Class Codes: H02M 3/07 using capacitors charged and discharged alternately by semiconductor devices with control electrode , e.g. charge pumps
• CPC Class Codes: H02M 3/072 adapted to generate an output voltage whose value is lower than the input voltage

Abstract

A charge pump circuit, and associated method and apparatuses, for providing a split-rail voltage supply, the circuit having a network of switches that is operable in a number of different states and a controller for operating the switches in a sequence of said states so as to generate positive and negative output voltages together spanning a voltage approximately equal to the input voltage and centered on the voltage at the common terminal.

Claims

1-32. -32. (canceled)

33. A charge pump circuit comprising:

an input terminal for receiving an input voltage;

first and second output terminals;

first and second pairs of flying capacitor terminals for connection to first and second flying capacitors respectively; and

a switch network for interconnecting said input terminal, said first and second pairs of flying capacitor terminals, and said first and second output terminals in a plurality of states to generate either a first positive output voltage and a first negative output voltage that are each substantially equal in magnitude to the magnitude of said input voltage or a second positive output voltage and a second negative output voltage that are each substantially equal in magnitude to half the magnitude of said input voltage, wherein said switch network interconnects said first and second pairs of flying capacitor terminals, such that, in one of the plurality of states, the first and second flying capacitor are connected in parallel while said first and second pairs of flying capacitor terminals are disconnected from said input terminal and said first and second output terminals.

34. The circuit of claim 33, further comprising a common terminal, wherein said switch network interconnects a flying capacitor terminal of either of said first or second pairs of flying capacitor terminals to said common terminal.

35. The circuit of claim 34, wherein, in one of the plurality of states, the switch network interconnects said first and second pairs of flying capacitor terminals such that the first and second flying capacitors are connected in parallel while said first and second pairs of flying capacitor terminals are disconnected from said input terminal, said common terminal, and said first and second output terminals.

36. The circuit of claim 33, further comprising a controller for operating said switch network in a sequence comprising one or more of said plurality of states.

37. The circuit of claim 36, wherein said sequence comprises one or more of said plurality of states occurring at different intervals.

38. The circuit of claim 36, further comprising a control signal terminal for receiving a control signal.

39. The circuit of claim 38, wherein the circuit generates either said first positive and negative output voltages or said second positive and negative output voltages in response to said control signal.

40. The circuit of claim 38, wherein said controller varies said sequence in response to said control signal.

41. The circuit of claim 36, wherein said controller is adapted to vary said sequence of said states according to a load condition.

42. The circuit of claim 33, further comprising a comparator for comparing at least one of said positive output or negative output voltages with a reference voltage.

43. An apparatus comprising:

first and second flying capacitors;

first and second reservoir capacitors; and

a charge pump circuit as recited in claim 33 for providing said first positive and negative output voltages or said second positive and negative output voltages for said audio apparatus, wherein said first flying capacitor is coupled to said first pair of flying capacitor terminals, said second flying capacitor is coupled to said second pair of flying capacitor terminals, said first reservoir capacitor is coupled to said first output terminal and said common terminal, and said second reservoir capacitor is coupled to said second output terminal and said common terminal.

44. The apparatus of claim 43, wherein the apparatus is an audio apparatus.

45. The apparatus of claim 44, wherein the audio apparatus is a MP3 player.

46. The apparatus of claim 43, wherein the apparatus is a mobile phone.

47. A method of generating a plurality of split-rail voltages comprising:

interconnecting first and second output voltage terminals with an input voltage terminal and first and second pairs of flying capacitor terminals, which are for connecting to first and second flying capacitors respectively, in a plurality of states to generate either a first positive output voltage and a first negative output voltage that are each substantially equal in magnitude to the magnitude of said input voltage or a second positive output voltage and a second negative output voltage that are each substantially equal in magnitude to half the magnitude of said input voltage, wherein said first and second pairs of flying capacitor terminals are interconnected, such that, in one state of the plurality of states, the first and second flying capacitors are connected in parallel while said first and second pairs of flying capacitor terminals are disconnected from said input voltage terminal and said first and second output voltage terminals.

48. The method of claim 47, furthering comprising interconnecting a flying capacitor terminal of either of said first or second pairs of flying capacitor terminals to a common terminal.

49. The method of claim 48, wherein one or more of said plurality of states are sequenced to generate either said first positive and negative output voltages or said second positive and negative output voltages.

50. The method of claim 49, wherein said sequence comprises at least two of said plurality of states.

51. The method of claim 49, wherein said sequence comprises one or more of said plurality of states occurring at different intervals.

52. The method of claim 49, wherein a control signal determines said sequence.

53. The method of claim 49, wherein a load condition determines said sequence.

54. The method of claim 48, wherein said first pair of flying capacitor terminals comprises first and second flying capacitor terminals and said second pair of flying capacitor terminals comprises third and fourth flying capacitor terminals.

55. The method of claim 54, wherein one of the plurality of states is obtained by connecting said input voltage terminal to said first flying capacitor terminal, said third flying capacitor terminal to said second flying capacitor terminal, and said fourth flying capacitor terminal to said common terminal.

56. The method of claim 54, wherein one of the plurality of states is obtained by connecting said first flying capacitor terminal to said first output voltage terminal, said second flying capacitor terminal to said common terminal, said second flying capacitor terminal to said third flying capacitor terminal, and said fourth flying capacitor terminal to said second output voltage terminal.

57. The method of claim 54, wherein one of the plurality of states is obtained by connecting said first flying capacitor terminal to said third flying capacitor terminal and said second flying capacitor terminal to said fourth flying capacitor terminal.

58. The method of claim 54, wherein one of the plurality of states is obtained by connecting said input voltage terminal to said first flying capacitor terminal and said second flying capacitor terminal to said common terminal.

59. The method of claim 54, wherein one of the plurality of states is obtained by connecting said input voltage terminal to said first flying capacitor terminal, said first flying capacitor terminal to said third flying capacitor terminal, and fourth flying capacitor terminal to said common terminal.

60. The method of claim 54, wherein one of the plurality of states is obtained by connecting said first output voltage terminal to said first flying capacitor terminal, said second flying capacitor terminal to said fourth flying capacitor terminal, and said fourth flying capacitor terminal to said second output voltage terminal.

61. The method of claim 54, wherein one of the plurality of states is obtained by connecting said first output voltage terminal to said first flying capacitor terminal, said flying capacitor terminal to said third flying capacitor terminal, and said fourth flying capacitor terminal to said second output voltage terminal.

62. The method of claim 54, wherein one of the plurality of states is obtained by connecting said input voltage terminal to said first flying capacitor terminal, said first output voltage terminal to said first flying capacitor terminal, said first flying capacitor terminal to said third flying capacitor terminal, said second flying capacitor terminal to said common terminal, said fourth flying capacitor terminal to said common terminal.

63. A charge pump circuit comprising:

an input terminal;

first and second output terminals;

first and second flying capacitor terminals for connection to a first flying capacitor;

third and fourth flying capacitor terminals for connection to a second flying capacitor; and

a switch network for interconnecting said input terminal, said first, second, third, and fourth flying capacitor terminals, and said first and second output terminals to generate either a first positive output voltage and a first negative output voltage that are each substantially equal in magnitude to the magnitude of said input voltage or a second positive output voltage and a second negative output voltage that are each substantially equal in magnitude to half the magnitude of said input voltage, said switch network comprising;

a first switch, which, when closed, electrically connects the first flying capacitor terminal to the third flying capacitor terminal;

a second switch, which, when closed, connects the second flying capacitor terminal to the third flying capacitor terminal; and

a third switch, which, when closed, connects the second flying capacitor terminal to the fourth flying capacitor terminal.

64. The circuit of claim 63, further comprising a common terminal, wherein said switch network interconnects at least one of said first, second, third, and fourth flying capacitor terminals to said common terminal.

65. The circuit of claim 64, wherein, in one of the plurality of states, the switch network interconnects said first, second, third, and fourth flying capacitor terminals such that the first and second flying capacitors are connected in parallel while said first, second, third, and fourth flying capacitor terminals are disconnected from said input terminal, said common terminal, and said first and second output terminals

66. The circuit of claim 63, further comprising a controller for operating said switch network in a sequence comprising one or more of said plurality of states.

67. The circuit of claim 66, wherein said sequence comprises one or more of said plurality of states occurring at different intervals.

68. The circuit of claim 66, further comprising a control signal terminal for receiving a control signal.

69. The circuit of claim 68, wherein the circuit generates either said first positive and negative output voltages or said second positive and negative output voltages in response to said control signal.

70. The circuit of claim 68, wherein said controller varies said sequence in response to said control signal.

71. The circuit of claim 66, wherein said controller is adapted to vary said sequence of said states according to a load condition.

72. The circuit of claim 63, further comprising a comparator for comparing at least one of said positive output or negative output voltages with a reference voltage.

73. An apparatus comprising:

first and second flying capacitors;

first and second reservoir capacitors; and

a charge pump circuit as recited in claim 63 for providing said first positive and negative output voltages or said second positive and negative output voltages for said audio apparatus, wherein said first flying capacitor is coupled to said first and second flying capacitor terminals, said second flying capacitor is coupled to said third and fourth flying capacitor terminals, said first reservoir capacitor is coupled to said first output terminal and said common terminal, and said second reservoir capacitor is coupled to said second output terminal and said common terminal.

74. The apparatus of claim 73, wherein the apparatus is an audio apparatus.

75. The apparatus of claim 74, wherein the audio apparatus is a MP3 player.

76. The apparatus of claim 73, wherein the apparatus is a mobile phone.