CODE-ASSISTED ERROR-DETECTION TECHNIQUE

• US 20110239084A1
• Filed: 08/18/2010
• Published: 09/29/2011
• Est. Priority Date: 02/25/2008
• Status: Active Grant

• Current Assignee: Rambus Inc.
• Original Assignee: Rambus Inc.
• Inventors: Abbasfar, Aliazam
• Granted Patent: US 8,407,558 B2
• Time in Patent Office: Days
• US Class Current: 714/758
• CPC Class Codes: G06F 11/0793 Remedial or corrective actions recovery from an exception in an instruction pipeline G06F9/3861; by retry G06F11/1402; for recovering from a failure of a protocol instance or entity H04L69/40
• CPC Class Codes: G06F 11/08 Error detection or correction by redundancy in data representation, e.g. by using checking codes
• CPC Class Codes: G06F 11/1004 to protect a block of data words, e.g. CRC or checksum G06F11/1076 takes precedence; security arrangements for protecting computers or computer systems against unauthorized activity G06F21/00

Abstract

Embodiments of a circuit are described. In this circuit, an encoder circuit encodes a set of N symbols as a given codeword in a code space, where the given codeword includes a set of M symbols. M drivers are coupled to the encoder circuit and are coupled to M links in a channel, where a given driver outputs a given symbol in the set of M symbols onto a given link. Moreover, an error-detection circuit, which is coupled to the encoder circuit, generates and stores error-detection information associated with the set of M symbols, where the error-detection information facilitates subsequent probabilistic determination of a type of error during communication of the set of M symbols to another circuit. Additionally, a receiver circuit receives feedback information from the other circuit. This feedback information includes error information about detection of another type of error in the set of M symbols based on characteristics of the code space. Furthermore, control logic performs remedial action based on the feedback information.

Claims

1-40. -40. (canceled)

41. A circuit to be coupled to another circuit, comprising:

input nodes to receive a set of symbols that are encoded using a Dynamic-Bus-Inversion (DBI) encoding technique;

a decoder circuit, coupled to the input nodes, to decode the set of symbols in accordance with the DBI encoding technique and to provide first error information indicating a first type of error in the set of symbols if the set of symbol corresponds to an invalid codeword according to the DBI encoding technique;

an error-detection circuit, coupled to the decoder circuit, to generate second error information associated with the set of symbols, wherein the second error information facilitates subsequent determination of a second type of error in the set of symbols, and wherein the second type of error is different from the first type of error; and

a transmit circuit to provide the first error information and the second error information to the other circuit, thereby facilitating remedial action by the other circuit if at least one of the first type of error and the second type of error occurred in the set of symbols.

50. A circuit to be coupled to another circuit, comprising:

an encoder circuit to encode a set of symbols using a Dynamic-Bus-Inversion (DBI) encoding technique;

a transmit circuit, coupled to the encoder circuit, to provide the encoded set of symbols to the other circuit;

an error-detection circuit, coupled to the encoder circuit, to generate error information associated with the encoded set of symbols;

a memory, coupled to the error-detection circuit, to store the error information;

a receive circuit to receive, from the other circuit, second error information that is generated by the other circuit;

control logic, coupled to the receive circuit, to determine if a type of error occurred during communication of the encoded set of symbols to the other circuit by comparing the stored error information and the received second error information, and to perform remedial action if the type of error occurred during communication of the encoded set of symbols to the other circuit.

62. A method for selectively performing remedial action, comprising:

encoding a set of symbols using a Dynamic-Bus-Inversion (DBI) encoding technique in an encoder circuit in a circuit;

transmitting the encoded set of symbols to another circuit;

generating error information associated with the encoded set of symbols in an error-detection circuit in the circuit;

storing the error information;

receiving, from the other circuit, second error information that is generated by the other circuit;

determining if a type of error occurred during communication of the encoded set of symbols to the other circuit by comparing the stored error information and the received second error information; and

performing remedial action if the type of error occurred during communication of the encoded set of symbols to the other circuit.