METHODS AND SYSTEMS FOR GENERATING LOCAL OSCILLATOR SIGNALS

• US 20110241748A1
• Filed: 02/25/2011
• Published: 10/06/2011
• Est. Priority Date: 03/02/2010
• Status: Active Grant

• Current Assignee: NXP B.V. (NXP Semiconductors NV)
• Original Assignee: NXP B.V. (NXP Semiconductors NV)
• Inventors: AYMARD, Olivier, LEONG, Frank Harald Erich Ho Chung
• Granted Patent: US 8,274,338 B2
• Time in Patent Office: Days
• US Class Current: 327/291
• CPC Class Codes: H03B 27/00 Generation of oscillations providing a plurality of outputs of the same frequency but differing in phase, other than merely two anti-phase outputs
• CPC Class Codes: H03D 7/1441 using field-effect transistors H03D7/145 takes precedence
• CPC Class Codes: H03D 7/1458 Double balanced arrangements, i.e. where both input signals are differential
• CPC Class Codes: H03D 7/1466 Passive mixer arrangements
• CPC Class Codes: H03D 7/1483 comprising components for selecting a particular frequency component of the output
• CPC Class Codes: H03D 7/165 at least two frequency changers being located in different paths, e.g. in two paths with carriers in quadrature combined with amplitude demodulation H03D1/2245, combined with angle demodulation H03D3/007; N-path filters H03H19/002
• CPC Class Codes: H03D 7/166 using two or more quadrature frequency translation stages

Abstract

A method is provided for generating local oscillator signals for a mixer. The method includes providing a reference frequency signal and generating a differential in-phase signal and a differential quadrature signal from the reference frequency signal. The method further includes re-clocking each of the differential in-phase and differential quadrature signals using the reference frequency signal. The re-clocked differential in-phase and differential quadrature signals are then provided as the local oscillator signals for the mixer.

Claims

1. A method for generating local oscillator signals for a mixer, the method comprising:

providing a reference frequency signal;

generating a differential in-phase signal and a differential quadrature signal from the reference frequency signal;

re-clocking each of the differential in-phase and differential quadrature signals using the reference frequency signal; and

providing the re-clocked differential in-phase and differential quadrature signals as the local oscillator signals for the mixer.

2. The method of claim 1, wherein generating the differential in-phase and differential quadrature signals includes

generating non-inverted and inverted signals from the reference frequency signal, the non-inverted and inverted signals having a period that is a factor N greater than that of the reference frequency signal, and

generating the differential in-phase and differential quadrature signals from the inverted and non-inverted signals, the differential in-phase and differential quadrature signals having a period that is twice that of the non-inverted and inverted signals.

3. The method of claim 2, wherein the factor N is 2.

4. The method of claim 2, wherein re-clocking each of the differential in-phase and differential quadrature signals includes

performing a logic AND function on the non-inverted signal and a non-inverted in-phase signal of the differential in-phase signal to generate a first signal,

performing a logic AND function on the non-inverted signal and an inverted in-phase signal of the differential in-phase signal to generate a second signal,

performing a logic AND function on the inverted signal and a non-inverted quadrature signal of the differential quadrature signal to generate a third signal,

performing a logic AND function on the inverted signal and an inverted quadrature signal of the differential quadrature signal to generate a fourth signal, and

re-clocking each of the first, second, third and fourth signals using the reference frequency signal to generate the local oscillator signals for the mixer.

5. The method of claim 1, wherein each of the re-clocked differential in-phase and quadrature signals has a 25% duty cycle.

6. The method of claim 1, wherein re-clocking each of the differential in-phase and differential quadrature signals includes re-clocking each of the differential in-phase and differential quadrature signals responsive to an edge of the reference frequency signal.

7. The method of claim 1, wherein the re-clocking of each of the differential in-phase and differential quadrature signals using the reference frequency signal includes aligning transitions of each of the differential in-phase and differential quadrature signals between high and low logic values to coincide with either the rising edges or the falling edges of the reference frequency signal.

8. The method of claim 1, wherein generating the differential in-phase and differential quadrature signals from the reference frequency signal introduces a delay in each of the differential in-phase and differential quadrature signals relative to the reference frequency signal.

9. The method of claim 8, wherein the delay in each of the differential in-phase and differential quadrature signals is less than one half the period of the reference frequency signal.

10. A system for generating local oscillator signals for a mixer, the system comprising:

a signal generator configured to provide a reference frequency signal;

a frequency divider configured to generate a differential in-phase signal and a differential quadrature signal from the reference frequency signal; and

circuitry configured to re-clock each of the differential in-phase and differential quadrature signals using the reference frequency signal and to provide the re-clocked differential in-phase and differential quadrature signals as the local oscillator signals for the mixer.

11. The system of claim 10, wherein the frequency divider includes

a first frequency divider configured to generate non-inverted and inverted signals from the reference frequency signal, the non-inverted and inverted signals having a period that is a factor N greater than that of the reference frequency signal, and

a quadrature divider configured to generate the differential in-phase and differential quadrature signals from the inverted and non-inverted signals, the differential in-phase and differential quadrature signals having a period that is twice that of the non-inverted and inverted signals.

12. The system of claim 11, wherein the factor N is 2.

13. The system of claim 11, wherein the circuitry includes a plurality of AND gates that each have an enable input, a first one of the AND gates configured to perform a logic AND function on the non-inverted signal and a non-inverted in-phase signal of the differential in-phase signal, a second one of the AND gates configured to perform a logic AND function on the non-inverted signal and an inverted in-phase signal of the differential in-phase signal, a third one of the AND gates configured to perform a logic AND function on the inverted signal and a non-inverted quadrature signal of the differential quadrature signal, and a fourth one of the AND gates configured to perform a logic AND function on the inverted signal and an inverted quadrature signal of the differential quadrature signal.

14. The system of claim 13, wherein the plurality of AND gates are configured to receive the reference frequency signal at their enable inputs.

15. The system of claim 10, wherein each of the re-clocked differential in-phase and quadrature signals has a 25% duty cycle.

16. The system of claim 10, wherein the circuitry is configured to re-clock each of the differential in-phase and differential quadrature signals responsive to an edge of the reference frequency signal.

17. The system of claim 10, wherein the circuitry is configured to re-clock each of the differential in-phase and differential quadrature signals using the reference frequency signal by aligning transitions of each of the differential in-phase and differential quadrature signals between high and low logic values to coincide with either the rising edges or the falling edges of the reference frequency signal.

18. The system of claim 10, wherein the frequency divider is further configured to introduce a delay in each of the differential in-phase and differential quadrature signals relative to the reference frequency signal.

19. The system of claim 18, wherein the delay in each of the differential in-phase and differential quadrature signals is less than one half the period of the reference frequency signal.

20. The system of claim 10, further comprising the mixer, wherein the mixer is configured to use the local oscillator signals to downconvert a received radio frequency signal.