DISPLAY DRIVING SYSTEM USING SINGLE LEVEL DATA TRANSMISSION WITH EMBEDDED CLOCK SIGNAL
First Claim
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1. A display driving system comprising:
- a timing controller including a receiving unit configured to receive data signals, a data processing unit configured to process and output the data signals, a clock generation unit configured to generate clock signals and timing control signals, and a transmission block configured to transmit the data signals, the clock signals and the timing control signals; and
a panel driving block including row driving units configured to sequentially scan gate signals to a display panel, and column driving units configured to receive the data signals transmitted from the transmission block through signal lines and drive the display panel,wherein the transmission block of the timing controller includes driving units configured to embed the clock signals between the data signals at the same level, and generate and output single level transmission data, andwherein the transmission data are transmitted to the column driving units in a manner divided into a clock training data transmission step, a control data transmission step and an RGB data transmission step.
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Abstract
A display driving system using single level data transmission with embedded clock signals. The display driving system is configured to embed a clock signal of the same level between data signals and transmit these signals as a single level signal, wherein a cycle at which clock signals are embedded is controlled and a data format is constructed such that a control data transmission step can be extended over 2 words.
48 Citations
19 Claims
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1. A display driving system comprising:
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a timing controller including a receiving unit configured to receive data signals, a data processing unit configured to process and output the data signals, a clock generation unit configured to generate clock signals and timing control signals, and a transmission block configured to transmit the data signals, the clock signals and the timing control signals; and a panel driving block including row driving units configured to sequentially scan gate signals to a display panel, and column driving units configured to receive the data signals transmitted from the transmission block through signal lines and drive the display panel, wherein the transmission block of the timing controller includes driving units configured to embed the clock signals between the data signals at the same level, and generate and output single level transmission data, and wherein the transmission data are transmitted to the column driving units in a manner divided into a clock training data transmission step, a control data transmission step and an RGB data transmission step. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19)
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Specification