RECEIVER AND METHOD FOR DYNAMICALLY ADJUSTING SENSITIVITY OF RECEIVER

• US 20110250860A1
• Filed: 04/13/2010
• Published: 10/13/2011
• Est. Priority Date: 04/13/2010
• Status: Active Grant

• Current Assignee: Himax Technologies Ltd. (Himax Technologies Incorporated)
• Original Assignee: Himax Technologies Ltd. (Himax Technologies Incorporated)
• Inventors: Lin, Shih-Chun
• Granted Patent: US 8,049,533 B1
• Time in Patent Office: Days
• US Class Current: 455/296
• CPC Class Codes: H04B 1/1036 with automatic suppression of narrow band noise or interference, e.g. by using tuneable notch filters H04B1/123 takes precedence; filter circuits H03H

Abstract

A receiver and a method for dynamically adjusting sensitivity of the receiver are provided. The receiver includes a detection unit and a receiving unit. The detection unit detects an input signal group, and outputs a detection result. The receiving unit receives the input signal group according to a sensitivity. Wherein, the receiving unit dynamically adjusts the sensitivity used for receiving the input signal group according to the detection result of the detection unit.

Claims

1. A receiver, comprising:

a detection unit, detecting whether an input signal group is a noise, and outputting a detection result; and

a receiving unit, receiving the input signal group according to a sensitivity, wherein the sensitivity determines the amount of the input signal group that passes through the receiving unit, and the receiving unit dynamically adjusts the sensitivity according to the detection result of the detection unit.

2. The receiver as claimed in claim 1, wherein the receiving unit comprises:

an amplifier, having a first input terminal and a second input terminal receiving the input signal group;

a first switch, being turned on/off according to the detection result;

a first resistor, the first switch and the first resistor being connected in series between the first input terminal of the amplifier and a first voltage;

a second switch, being turned on/off according to the detection result; and

a second resistor, the second switch and the second resistor being connected in series between the second input terminal of the amplifier and a second voltage.

3. The receiver as claimed in claim 1, wherein the receiving unit comprises:

an amplifier, having an input terminal receiving the input signal group;

a first current source, determining a current amount of a first current according to the detection result, and providing the first current to a first supply end of the amplifier; and

a second current source, determining a current amount of a second current according to the detection result, and providing the second current to a second supply end of the amplifier.

4. The receiver as claimed in claim 1, wherein the receiving unit comprises:

an amplifier, having a first input terminal and a second input terminal receiving the input signal group;

a first transistor, having a control terminal receiving the detection result, a first terminal coupled to the first input terminal of the amplifier, and a second terminal coupled to a first voltage; and

a second transistor, having a control terminal receiving the detection result, a first terminal coupled to the second input terminal of the amplifier, and a second terminal coupled to a second voltage.

5. The receiver as claimed in claim 1, wherein the receiving unit comprises:

a voltage comparator, connected to the detection unit for receiving the detection result, comparing a voltage value of the detection result with at least one reference voltage, and outputting a comparison result;

an amplifier, having a first input terminal and a second input terminal receiving the input signal group;

at least one first switch, being turned on/off according to the comparison result;

at least one first resistor, the first switch and the first resistor being connected in series between the first input terminal of the amplifier and a first voltage;

at least one second switch, being turned on/off according to the comparison result; and

at least one second resistor, the second switch and the second resistor being connected in series between the second input terminal of the amplifier and a second voltage.

6. The receiver as claimed in claim 1, wherein the input signal group comprises a clock signal and a data signal, the detection unit detects the clock signal to output the detection result, and the receiving unit receives the data signal according to the sensitivity.

7. The receiver as claimed in claim 6, wherein the detection unit comprises a delay locked loop (DLL), and the DLL receives the clock signal.

8. The receiver as claimed in claim 7, wherein the detection result is a delay control voltage of a voltage controlled delay line (VCDL) in the DLL.

9. The receiver as claimed in claim 7, wherein the detection unit further comprises:

a voltage comparator, connected to the DLL, for receiving a delay control voltage of a VCDL in the DLL, comparing the delay control voltage with a reference voltage, and transmitting a comparison result to the receiving unit to serve as the detection result.

10. The receiver as claimed in claim 6, wherein the detection unit comprises a phase locked loop (PLL), and the PLL receives the clock signal.

11. The receiver as claimed in claim 10, wherein the detection result is a frequency control voltage of a voltage-controlled oscillator (VCO) in the PLL.

12. The receiver as claimed in claim 10, wherein the detection unit further comprises:

a frequency comparator, connected to an output terminal of the PLL, for comparing a frequency of an output signal of the PLL with a reference frequency, and transmitting a comparison result to the receiving unit to serve as the detection result.

13. The receiver as claimed in claim 10, wherein the detection unit further comprises:

a voltage comparator, connected to the PLL, for receiving a frequency control voltage of a VCO in the PLL, comparing the frequency control voltage with a reference voltage, and transmitting a comparison result to the receiving unit to serve as the detection result.

14. The receiver as claimed in claim 1, wherein the input signal group comprises a clock signal and a data signal, the receiving unit receives the data signal according to the sensitivity, and the detection unit comprises:

an amplifier, receiving the clock signal according to the sensitivity; and

a DLL, having an input terminal connected to an output terminal of the amplifier,

wherein the DLL provides the detection result to the receiving unit and the amplifier, so as to dynamically adjust the sensitivity.

15. The receiver as claimed in claim 1, wherein the input signal group comprises a clock signal and a data signal, the receiving unit receives the data signal according to the sensitivity, and the detection unit comprises:

an amplifier, receiving the clock signal according to the sensitivity; and

a PLL, having an input terminal connected to an output terminal of the amplifier,

wherein the PLL provides the detection result to the receiving unit and the amplifier, so as to dynamically adjust the sensitivity.

20. The receiver as claimed in claim 1, wherein the sensitivity is dynamically decreased when the input signal group is the noise, and the sensitivity is dynamically increased when the input signal group is a normal signal.

16. A method for dynamically adjusting sensitivity of a receiver, comprising:

detecting a phase of an input signal group to determine whether the input signal group is a noise, and outputting a detection result;

receiving the input signal group according to a sensitivity, wherein the sensitivity determines the amount of the input signal group that passes through the receiving unit; and

dynamically adjusting the sensitivity according to the detection result.

17. The method for dynamically adjusting the sensitivity of the receiver as claimed in claim 16, wherein the step of dynamically adjusting the sensitivity comprises:

pulling apart common-mode voltages of a first input terminal and a second input terminal of an amplifier when the phase of the input signal group is not locked; and

do not pull apart the common-mode voltages of the first input terminal and the second input terminal of the amplifier when the phase of the input signal group has been locked.

18. The method for dynamically adjusting the sensitivity of the receiver as claimed in claim 16, wherein the step of dynamically adjusting the sensitivity comprises:

decreasing a current of a supply end of an amplifier when the phase of the input signal group is not locked; and

increasing the current of the supply end of the amplifier when the phase of the input signal group has been locked.

19. The method for dynamically adjusting the sensitivity of the receiver as claimed in claim 16, wherein the input signal group comprises a clock signal and a data signal, the step of detecting the phase of the input signal group comprises detecting a phase of the clock signal to output the detection result, and the step of receiving the input signal group according to the sensitivity comprises receiving the data signal according to the sensitivity.

21. The method for dynamically adjusting the sensitivity of the receiver as claimed in claim 16, further comprises

dynamically decreasing the sensitivity when the input signal group is the noise;

and

dynamically increasing the sensitivity when the input signal group is a normal signal.