PHASE LOCKED LOOP, SEMICONDUCTOR DEVICE, AND WIRELESS TAG

• US 20110254600A1
• Filed: 06/30/2011
• Published: 10/20/2011
• Est. Priority Date: 11/30/2006
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: KATO, Kiyoshi, MATSUZAKI, Takanori
• Granted Patent: US 8,773,207 B2
• Time in Patent Office: Days
• US Class Current: 327/156
• CPC Class Codes: H03L 7/093 using special filtering or amplification characteristics in the loop H03L7/087 - H03L7/091 take precedence
• CPC Class Codes: H03L 7/0995 the oscillator comprising a ring oscillator
• CPC Class Codes: H03L 7/1075 by changing characteristics of the loop filter, e.g. changing the gain, changing the bandwidth H03L7/1072 takes precedence
• CPC Class Codes: H03L 7/18 using a frequency divider or counter in the loop H03L7/20, H03L7/22 take precedence

Abstract

An object is to provide a PLL having a wide operating range. Another object is to provide a semiconductor device or a wireless tag which has a wide operating range in a communication distance or temperature by incorporating such a PLL. The semiconductor device or the wireless tag includes a first divider circuit; a second divider circuit; a phase comparator circuit to which an output of the first divider circuit and an output of the second divider circuit are provided; a loop filter to which an output of the phase comparator circuit is supplied and in which a time constant is switched in accordance with an inputted signal; and a voltage controlled oscillator circuit to which an output of the loop filter is supplied and which supplies an output to the second divider circuit.

Claims

1. A semiconductor device comprising:

a phase locked loop comprising a loop filter, and configured to output a clock signal;

an antenna electrically connected to the phase locked loop, and configured to receive an electromagnetic wave; and

a battery configured to be charged wirelessly by the electromagnetic wave, and output a power supply voltage to the phase locked loop,

wherein a characteristic of the phase locked loop is switched in accordance with switching a time constant of the loop filter,

wherein the clock signal is generated by the electromagnetic wave, and

wherein the semiconductor device is configured to perform wireless communication.

3. The semiconductor device according to claim 1, further comprising a logic circuit receiving the clock signal, a demodulation circuit and a modulation circuit.

5. The semiconductor device according to claim 1, wherein the phase locked loop further comprises a comparator circuit, and a voltage controlled oscillator circuit.

2. A semiconductor device comprising:

a phase locked loop comprising a divider circuit, and configured to output a clock signal;

an antenna electrically connected to the phase locked loop, and configured to receive an electromagnetic wave; and

a battery configured to be charged wirelessly by the electromagnetic wave, and output a power supply voltage to the phase locked loop,

wherein a characteristic of the phase locked loop is switched in accordance with switching a frequency division number of the divider circuit,

wherein the clock signal is generated by the electromagnetic wave, and

wherein the semiconductor device is configured to perform wireless communication.

4. The semiconductor device according to claim 2, further comprising a logic circuit receiving the clock signal, a demodulation circuit and a modulation circuit.

6. The semiconductor device according to claim 2, wherein the phase locked loop further comprises a comparator circuit, and a voltage controlled oscillator circuit.