METHOD AND SYSTEM FOR ACCESSING A FLASH MEMORY DEVICE
First Claim
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1. A semiconductor memory device comprising:
- a plurality of flash memory blocks, each of the flash memory blocks having respective row decoding circuitry and respective sense amplifier circuitry; and
an at least one interface, operable to address the flash memory blocks, and operable to initiate operations performed in at least two of the flash memory blocks in overlapping time periods, andthe at least one interface and the flash memory blocks being provided in a single chip of the semiconductor memory device.
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Abstract
An apparatus, system, and computer-implemented method for controlling data transfer between a plurality of serial data link interfaces and a plurality of memory banks in a semiconductor memory is disclosed. In one example, a flash memory device with multiple links and memory banks, where the links are independent of the banks, is disclosed. The flash memory devices may be cascaded in a daisy-chain configuration using echo signal lines to serially communicate between memory devices. In addition, a virtual multiple link configuration is described wherein a single link is used to emulate multiple links.
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Citations
24 Claims
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1. A semiconductor memory device comprising:
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a plurality of flash memory blocks, each of the flash memory blocks having respective row decoding circuitry and respective sense amplifier circuitry; and an at least one interface, operable to address the flash memory blocks, and operable to initiate operations performed in at least two of the flash memory blocks in overlapping time periods, and the at least one interface and the flash memory blocks being provided in a single chip of the semiconductor memory device. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
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17. A method carried out in a semiconductor memory device having a plurality of flash memory blocks, each of the flash memory blocks having respective row decoding circuitry and respective sense amplifier circuitry, and the method comprising:
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initiating, using an at least one interface, operations in at least two of the flash memory blocks; and performing the operations in overlapping time periods and in a single chip of the semiconductor memory device that includes the flash memory blocks, and wherein each of the operations is performed in a respective one of the at least two flash memory blocks. - View Dependent Claims (18, 19, 20, 21, 22, 23, 24)
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Specification