RADIATION-EMITTING SEMICONDUCTOR CHIP

• US 20110260205A1
• Filed: 10/29/2009
• Published: 10/27/2011
• Est. Priority Date: 11/28/2008
• Status: Active Grant

• Current Assignee: OSRAM OLED GMBH (Ams-Osram AG)
• Original Assignee: Osram Opto Semiconductors GmbH (Ams-Osram AG)
• Inventors: Von Malm, Norwin, Engl, Karl, Rode, Patrick, Moosburger, Jürgen, Höppel, Lutz
• Granted Patent: US 9,054,016 B2
• Time in Patent Office: Days
• US Class Current: 257/99
• CPC Class Codes: H01L 25/167 comprising optoelectronic devices, e.g. LED, photodiodes
• CPC Class Codes: H01L 27/15 including semiconductor components having potential barriers, specially adapted for light emission
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2933/0016 relating to electrodes
• CPC Class Codes: H01L 33/005 Processes
• CPC Class Codes: H01L 33/02 characterised by the semiconductor bodies
• CPC Class Codes: H01L 33/08 with a plurality of light emitting regions, e.g. laterally discontinuous light emitting layer or photoluminescent region integrated within the semiconductor body H01L27/15 takes precedence
• CPC Class Codes: H01L 33/382 the electrode extending partially in or entirely through the semiconductor body
• CPC Class Codes: H01L 33/62 Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Abstract

A radiation-emitting semiconductor chip includes a carrier and a semiconductor body having a semiconductor layer sequence, wherein an emission region and a protective diode region are formed in the semiconductor body having the semiconductor layer sequence; the semiconductor layer sequence includes an active region that generates radiation, the active region being arranged between a first semiconductor layer and a second semiconductor layer; the first semiconductor layer is arranged on a side of the active region which faces away from the carrier; the emission region has a recess extending through the active region; the first semiconductor layer in the emission region is electrically conductively connected to a first connection layer, wherein the first connection layer extends in the recess from the first semiconductor layer toward the carrier; and the first connection layer in the protective diode region is electrically conductively connected to the second semiconductor layer.

Claims

1. A radiation-emitting semiconductor chip comprising a carrier and a semiconductor body having a semiconductor layer sequence, wherein

an emission region and a protective diode region are formed in the semiconductor body having the semiconductor layer sequence;

the semiconductor layer sequence comprises an active region that generates radiation, said active region being arranged between a first semiconductor layer and a second semiconductor layer;

the first semiconductor layer is arranged on a side of the active region which faces away from the carrier

the emission region has a recess extending through the active region;

the first semiconductor layer, the emission region, is electrically conductively connected to a first connection layer, wherein the first connection layer extends in the recess from the first semiconductor layer the carrier; and

the first connection layer, in the protective diode region, is electrically conductively connected to the second semiconductor layer.

2. The semiconductor chip according to claim 1,

wherein the emission region and the protective diode region are connected in antiparallel with one another with regard to their forward direction.

3. The semiconductor chip according to claim 1,

wherein the emission region and the protective diode region are regions of the semiconductor body arranged alongside one another in a lateral direction.

4. The semiconductor chip according to claim 1,

wherein the semiconductor body is cohesively connected to the carrier, and wherein the first connection layer runs in regions between the semiconductor body and the carrier.

5. The semiconductor chip according to claim 1,

wherein the second semiconductor layer in the emission region is electrically conductively connected to a second connection layer.

6. The semiconductor chip according to claim 5,

wherein the second connection layer runs in regions between the emission region and the first connection layer.

7. The semiconductor chip according to claim 5,

wherein the second connection layer in the protective diode region is electrically conductively connected to the first semiconductor layer.

8. The semiconductor chip according to claim 5,

wherein the protective diode region has a further recess, wherein the second connection layer extends from the first semiconductor layer in the further recess toward the carrier.

9. The semiconductor chip according to claim 5,

wherein the semiconductor chip has a contact provided for external contact-connection of the second connection layer.

10. The semiconductor chip according to claim 9,

wherein the contact is formed by a contact layer, which, at least in selected regions, covers a side area delimiting the protective diode region in a lateral direction.

11. The semiconductor, chip according to claim 10,

wherein the contact covers the protective diode region at least in regions in a plan view of the semiconductor chip.

12. The semiconductor chip according to claim 9,

wherein the contact and the protective diode region are arranged alongside one another in a plan view of the semiconductor chip.

16. The semiconductor chip according to claim 2,

wherein the emission region and the protective diode region are regions of the semiconductor body arranged alongside one another in a lateral direction.

17. The semiconductor chip according to claim 6,

wherein the second connection layer in the protective diode region is electrically conductively connected to the first semiconductor layer.

18. The semiconductor chip according to claim 6,

wherein the protective diode region has a further recess, wherein the second connection layer extends from the first semiconductor layer in the further recess toward the carrier.

19. The semiconductor chip according to claim 7,

wherein the protective diode region has a further recess, wherein the second connection layer extends from the first semiconductor layer in the further recess toward the carrier.

20. The semiconductor, chip according to claim 6,

wherein the semiconductor chip has a contact provided for external contact-connection of the second connection layer.

13. A method for producing a plurality of radiation-emitting semiconductor chips comprising:

a) providing a semiconductor layer sequence having an active region that generates radiation, said active region being arranged between a first semiconductor layer and a second semiconductor layer;

b) forming a plurality of recesses extending through the second semiconductor layer and through the active region;

c) forming a first connection layer on the semiconductor layer sequence, wherein the first connection layer, in the recesses, is electrically conductively connected to the first semiconductor layer, and wherein the first connection layer is electrically conductively connected in regions to the second semiconductor layer;

d) forming an assemblage comprising the semiconductor layer sequence and a carrier;

e) forming a plurality of emission regions and a plurality of protective diode regions from the semiconductor layer sequence, wherein the emission regions each have at least one recess and, in the protective diode regions, the first connection layer is electrically, conductively connected to the second semiconductor layer;

singulating the assemblage into a plurality of semiconductor chips, wherein each semiconductor chip has at least one emission region and at least one protective diode region.

14. The method according to claim 13

wherein, before step e), a growth substrate for the semiconductor layer sequence is removed at least in selected regions.

15. The method according to claim 13,

further comprising producing a plurality of semiconductor chips.