SYSTEM AND METHOD FOR RAPIDLY CALCULATING RISK IN AN ELECTRONIC TRADING EXCHANGE

• US 20110264577A1
• Filed: 04/20/2011
• Published: 10/27/2011
• Est. Priority Date: 04/27/2010
• Status: Active Grant

• Current Assignee: Nasdaq Technology AB (Nasdaq, Inc.)
• Original Assignee: OMX Technology AB
• Inventors: Winbom, Hàkan, Ahlenius, Ulf
• Granted Patent: US 8,315,940 B2
• Time in Patent Office: Days
• US Class Current: 705/37
• CPC Class Codes: G06Q 40/04 Trading; Exchange, e.g. stocks, commodities, derivatives or currency exchange

Abstract

Latency in electronic trading is dramatically reduced by delaying trade order validation until a match or trade can potentially occur. If a new order does not meet the matching criteria for an existing order in an order book, then the new order is stored in the order book without performing validation processing in a first example embodiment. In a second example embodiment, the order is stored in the order book before validation has completed. But if a new order meets matching criteria for an existing order stored in an order book, then order validation processing is performed for both of the matching orders. Once the order validation processing is successfully completed for both of the matching orders, then the trade is executed. Order validation processing includes both risk calculations and account validations, (e.g., checking to ensure the party has the necessary money or collateral if a buyer or is the owner if a seller). If the order validation processing is not successfully completed for both of the matching orders, then the trade is rejected.

Claims

1. A trade order processing method for reducing trade order processing latency in an electronic trading exchange, comprising the steps of:

receiving at the electronic trading exchange trade orders to be matched against trade orders stored in a trade order book in a memory;

storing at least some of the received trade orders in the trade order book before validating those received trade orders for trading risk;

determining whether a first one of the received trade orders matches a second trade order stored in the trade order book; and

verifying that the matched first and second trade orders are trade risk validated before executing a trade of the matched first and second trade orders.

2. The trade order processing method of claim 1, wherein

the first trade order is stored in the trade order book if it does not match the second trade order, and

the first trade order and the second trade order are validated after it is determined that the first one of the received trade orders matches the second trade order.

3. The trade order processing method of claim 1, wherein the step of determining whether the first trade order matches the second trade order is executed in parallel with validating one or both of the first and second trade orders.

4. A non-transitory computer-readable storage medium having computer readable code embodied therein for executing the trade order processing method of claim 1.

5. The trade order processing method of claim 1, further comprising removing a trade order stored in the trade order book if the trade order is found invalid.

6. The trade order processing method of claim 1, wherein validating the trade orders includes calculating a risk associated with the trade orders and/or confirming properties of an account associated with the trade orders.

7. An electronic trading exchange apparatus, comprising:

a memory configured to store a trade order book for storing trade orders; and

electronic circuitry, coupled to the memory, for reducing trade order processing latency in an electronic trading exchange and configured to;

receive trade orders to be matched against trade orders stored in the trade order book;

store at least some of the received trade orders in the trade order book before validating those received trade orders for trading risk;

determine that a first one of the received trade orders matches a second trade order stored in the trade order book, and

verify that the matched first and second trade orders are validated for trade risk before executing a trade of the matched first and second trade orders.

8. The electronic trading exchange apparatus according to claim 7, wherein the electronic circuitry is configured to remove a trade order stored in the trade order book if the trade order is not validated.

9. The electronic trading exchange apparatus according to claim 7, wherein the electronic circuitry is configured to validate trade orders by calculating a risk associated with each of the trade orders and confirming an account associated with each of the trade orders.

10. An electronic trading exchange apparatus, comprising:

a memory configured to store a trade order book for storing trade orders; and

a data processor, coupled to the memory, for reducing trade order processing latency when matching trade orders in an electronic trading exchange and programmed to;

receive a first trade order for executing a trade with a second trade order stored in the trade order book,

determine if the first trade order matches the second trade order stored in the trade order book before validating the first and second trade orders for trade risk,

store the first trade order in the trade order book without trade risk validating the first trade order if the first trade order does not match the second trade order,

validate the first trade order and the second trade order for trade risk after the first trade order matches the second trade order, and

execute a trade of the matched first and second trade orders if the first and second trade orders are successfully trade risk validated.

11. The electronic trading exchange apparatus in claim 10, wherein the data processor is programmed to remove an invalidated order from the order book.

12. An electronic trading exchange apparatus, comprising:

a memory configured to store a trade order book for storing trade orders; and

a processor, coupled to the memory, for reducing trade order processing latency when matching trade orders in an electronic trading exchange and configured to;

receive trade orders to be matched against trade orders stored in the trade order book,

store at least some of the received trade orders in the trade order book before validating those received trade orders for trade risk, and

determine in parallel operations whether a first one of the received trade orders matches a second trade order stored in the order book and whether the first and second trade orders are valid trade orders from a trade risk standpoint,

wherein the processor is further configured to complete the parallel operations before executing a trade of the matched first and second trade orders.

13. The electronic trading exchange apparatus according to claim 12, wherein the processor is further configured to:

assign a first validation status marker to the first trade order and a second validation status marker to the second trade order, the first and second validation status markers indicating whether the first trade order or the second trade order has undergone validation processing.

14. The electronic trading exchange apparatus according to claim 13, wherein the validation status markers contain a status indicator from a group including at least one of:

accepted, not accepted, and not yet calculated.

15. The electronic trading exchange apparatus according to claim 13, wherein the processor is further configured to:

determine the status of the first validation status marker, and either reject the first one of the received trade orders or remove the first one of the received trade orders from the trade order book if the status of the first validation status marker is not accepted.

16. The electronic trading exchange apparatus according to claim 13, wherein the processor is further configured to:

determine the status of the first validation status marker;

store the first one of the received trade orders in the trade order book if the first one of the received trade orders does not match the second trade order and the first validation status marker is accepted; and

determine the status of the second validation status marker if the first one of the received trade orders matches the second trade order and the first validation status marker is accepted.

17. The electronic trading exchange apparatus according to claim 13, wherein the processor is further configured to:

store the first one of the received trade orders in the trade order book if the first one of the received trade orders does not match the second trade order and the status of the first validation status marker is not yet calculated.

18. The electronic trading exchange apparatus according to claim 13, wherein the processor is further configured to:

validate the first trade order if the first trade order matches the second trade order and the status of the first validation status marker is not yet calculated; and

validate the second trade order if the status of the first validation status marker changes from not yet calculated to accepted and the status of the second validation status marker is not yet calculated.

19. The electronic trading exchange apparatus according to claim 12, wherein the processor is configured to match the first trade order and the second trade order using a single-threaded processing and to validate the first trade order and the second trade order using multi-threaded processing.

20. The electronic trading exchange apparatus according to claim 12, wherein the electronic trading exchange apparatus is implemented on a high performance computing system that includes multiple parallel clusters of computing nodes coupled to shared memory to reduce order processing latency.

21. The electronic trading exchange apparatus according to claim 12, wherein the electronic trading exchange apparatus is implemented on a high performance computing system that includes a shared nothing computing architecture combined with dedicated hardware to reduce order processing latency.

22. The electronic trading exchange apparatus according to claim 12, wherein the electronic trading exchange apparatus is implemented on a high performance computing system that includes shared memory and shared nothing computer architectures to reduce order processing latency.