System on a Chip Using Integrated MEMS and CMOS Devices

• US 20110265574A1
• Filed: 10/27/2010
• Published: 11/03/2011
• Est. Priority Date: 10/28/2009
• Status: Active Grant

• Current Assignee: Movella Incorporated (Movella Holdings, Inc.)
• Original Assignee: mCube, Inc.
• Inventors: Yang, Xiao "Charles"
• Granted Patent: US 8,823,007 B2
• Time in Patent Office: Days
• US Class Current: 73/658
• CPC Class Codes: B81B 2207/015 the micromechanical device and the control or processing electronics being integrated on the same substrate
• CPC Class Codes: B81C 1/00246 Monolithic integration, i.e. micromechanical structure and electronic processing unit are integrated on the same substrate
• CPC Class Codes: B81C 1/00396 Mask characterised by its composition, e.g. multilayer masks
• CPC Class Codes: B81C 1/00626 Processes for achieving a desired geometry not provided for in groups B81C1/00563 - B81C1/00619
• CPC Class Codes: B81C 2201/0198 for making a masking layer
• CPC Class Codes: B81C 2203/0136 Growing or depositing of a covering layer

Abstract

An integrated MEMS system in which CMOS and MEMS devices are provided to form an integrated CMOS-MEMS system. The system can include a silicon substrate layer, a CMOS layer, MEMS and CMOS devices, and a wafer level packaging (WLP) layer. The CMOS layer can form an interface region, one which any number of CMOS MEMS devices can be configured.

Claims

1. A system comprising:

a semiconductor substrate;

at least one CMOS device overlying the semiconductor substrate, the CMOS device being configured to provide a logic array and a memory array;

a surface region overlying the CMOS device, the surface region forming an interface region;

at least a first micro electrical mechanical system (MEMS) configured in a first region overlying a first portion of the interface region, wherein the first MEMS is configured to sense first physical perturbations; and

a second MEMS configured in a second region overlying a second portion of the interface region, wherein the second MEMS is configured to sense second physical perturbations, the first physical perturbations being different from the second physical perturbations.

2. The system of claim 1 wherein the first MEMS is selected from a group consisting of:

an accelerometer, a gyroscope, magnetic sensor, a pressure sensor, a microphone, a humidity sensor, a temperature sensor, a chemical sensor, a biosensor, an inertial sensor.

3. The system of claim 1 wherein the second MEMS is selected from a group consisting of:

an accelerometer, a gyroscope, magnetic sensor, a pressure sensor, a microphone, a humidity sensor, a temperature sensor, a chemical sensor, a biosensor, an inertial sensor.

4. The system of claim 1 wherein the first MEMS is fabricated from a deposited material that is used to fabricate the second MEMS.

5. The system of claim 1 wherein the first MEMS is fabricated using a mask layer that is used to fabricate the second MEMS.

6. The system of claim 1 wherein the first MEMS is fabricated using a semiconductor process that is used in fabricating the second MEMS.

7. The system of claim 1 wherein the one or more CMOS devices is further configured as one or more processing devices.

8. The system of claim 1 wherein the first portion of the interface region is spatially separated from the second portion of the interface region.

9. The system of claim 1 further comprising a third MEMS configured in one or more third regions and a fourth MEMS configured in one or more fourth regions;

whereupon the third MEMS is different from the fourth MEMS.

10. The system of claim 9 wherein the first MEMS comprises an accelerometer, the second MEMS comprises a gyroscope, the third MEMS comprises a magnetic sensor, and the fourth MEMS comprises a pressure sensor.

11. The system of claim 1 wherein the first MEMS and the second MEMS comprise one or more deposited materials.

12. The system of claim 1 wherein the first MEMS and the second MEMS comprise one or more bonded materials.

13. The system of claim 1 wherein the interface region is integrated with the one or more CMOS devices.

14. The system of claim 1 wherein the first MEMS comprise an upper surface region that faces away from the one or more CMOS devices.

15. The system of claim 1 wherein the second MEMS comprises an upper surface region that faces away from the one or more CMOS devices.

16. The system of claim 1 wherein the one or more CMOS devices comprise at least four metal layers.

17. The system of claim 1 wherein the one or more CMOS devices are provided on a 0.18 micron design rule or less.

18. The system of claim 1 wherein the one or more CMOS devices comprise at least six metal layers.

19. The system of claim 1 further comprising an encapsulation structure overlying the first MEMS and the second MEMS.

20. The system of claim 1 further comprising a wafer level package structure enclosing the first MEMS and the second MEMS.

21. The system of claim 1 further comprising a wafer level package structure enclosing the first MEMS and the second MEMS and configured to hermetically seal the first and second MEMS.

22. The system of claim 1 further comprising a wafer level package structure enclosing the first MEMS and the second MEMS and configured to seal the first MEMS and the second MEMS.

23. The system of claim 1 wherein the first MEMS is at least a three axis accelerometer and the second MEMS is at least a six axis inertial sensing device.

24. The system of claim 23 wherein the six axis inertial sensing device is configured to detect an x-direction, a y-direction, a z-direction, linear motion, and angular motion.

25. The system of claim 1 wherein the first MEMS comprises a magnetic sensor, the magnetic sensor comprising a first electrode, a ferromagnetic material, and a second electrode.

26. The system of claim 1 wherein the one or more CMOS devices are configured from a foundry compatible process.

27. The system of claim 1

wherein the semiconductor substrate is encapsulated within a package, and

wherein the system further comprises:

a memory configured to store executable instructions;

a display configured to output data to a user; and

a processor electrically coupled to the memory and to the package, wherein the processor is configured to execute executable instructions from the memory, wherein the processor is configured to receive signals from the first MEMS device in response to the first physical perturbations, wherein the processor is configured to perform one or more tasks in response to the signals from the first MEMS device, wherein the processor is configured to receive signals from the second MEMS device in response to the second physical perturbations, and wherein the processor is configured to perform one or more tasks in response to the signals from the second MEMS device.

28. A method for fabricating a semiconductor device comprising:

receiving a semiconductor substrate;

forming one or more CMOS devices upon the semiconductor substrate;

forming an interface layer on top of the one or more CMOS devices; and

forming one or more MEMS physical sensors upon the interface layer using a foundry compatible process.

29. The method of claim 28 wherein two or more MEMS physical sensors are formed upon the interface layer.

30. The method of claim 29 wherein forming one or more MEMS physical sensors comprises:

depositing a first material layer above the interface layer;

forming a first MEMS physical sensor using the first material layer; and

forming a second MEMS physical sensor using the first material layer.

31. The method of claim 29 wherein forming one or more MEMS physical sensors comprises:

depositing one or more material layers above the interface layer;

disposing a first mask layer above the one or more material layers;

patterning a portion of the first MEMS physical sensor using the first mask layer; and

patterning a portion of the second MEMS physical sensor using the first mask layer.

32. The method of claim 29 wherein forming one or more MEMS physical sensors comprises:

processing one or more material layers above the interface layer to form a processed layer;

forming a first MEMS physical sensor using the processed layer; and

forming a second MEMS physical sensor using the processed layer.

33. The method of claim 29 further comprising encapsulating the substrate into a first package.

34. The method of claim 29 wherein the first MEMS is selected from a group consisting of:

an accelerometer, a gyroscope, magnetic sensor, a pressure sensor, a microphone, a humidity sensor, a temperature sensor, a chemical sensor, a biosensor, an inertial sensor.

35. The method of claim 29 wherein the second MEMS is selected from a group consisting of:

an accelerometer, a gyroscope, magnetic sensor, a pressure sensor, a microphone, a humidity sensor, a temperature sensor, a chemical sensor, a biosensor, an inertial sensor.

36. The method of claim 30 further comprising:

electrically coupling the first package to a processor,

electrically coupling the processor to a memory and a display;

disposing the first package, the processor, the memory, and the display into a physical case.