SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
First Claim
1. A semiconductor device comprising:
- a lower gate electrode;
an upper gate electrode on the lower gate electrode;
a contact plug interposed between the lower gate electrode and the upper gate electrode, and connecting the lower gate electrode to the upper gate electrode; and
a functional electrode spaced apart from the upper gate electrode and formed at the same height as the upper gate electrode.
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Accused Products
Abstract
Provided are a semiconductor device including a dual gate transistor and a method of fabricating the same. The semiconductor device includes a lower gate electrode, an upper gate electrode on the lower gate electrode, a contact plug interposed between the lower gate electrode and the upper gate electrode, and connecting the lower gate electrode to the upper gate electrode, and a functional electrode spaced apart from the upper gate electrode and formed at the same height as the upper gate electrode. The dual gate transistor exhibiting high field effect mobility is applied to the semiconductor device, so that characteristics of the semiconductor device can be improved. In particular, since no additional mask or deposition process is necessary, a large-area high-definition semiconductor device can be mass-produced with neither an increase in process cost nor a decrease in yield.
41 Citations
14 Claims
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1. A semiconductor device comprising:
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a lower gate electrode; an upper gate electrode on the lower gate electrode; a contact plug interposed between the lower gate electrode and the upper gate electrode, and connecting the lower gate electrode to the upper gate electrode; and a functional electrode spaced apart from the upper gate electrode and formed at the same height as the upper gate electrode. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method of fabricating a semiconductor device, comprising:
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forming a lower gate electrode; forming a gate insulating layer on an entire surface of the resultant structure in which the lower gate electrode is formed; forming a conductive layer for an electrode on the gate insulating layer; and etching the conductive layer for an electrode to form an upper gate electrode located above the lower gate electrode and a first functional electrode spaced apart from the upper gate electrode. - View Dependent Claims (10, 11, 12, 13, 14)
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Specification