Kickback Voltage Equalization
First Claim
1. A gate driver system of a touch screen, comprising:
- a plurality of gate lines connected to display pixel transistors;
a display driver that generates first and second gate clock signals including first and second voltage transitions, respectively; and
a plurality of gate drivers that receive the first and second gate clock signals via gate clock lines and that apply gate line signals, based on the gate clock signals, to the gate lines, wherein a first voltage change generated in a common electrode line of the touch screen by the first voltage transition is reduced by a second voltage change generated in the common electrode by the second voltage transition.
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Accused Products
Abstract
Scanning gate lines in a gate driver system of a touch screen is provided. The gate driver system can include gate lines connected to display pixel transistors, a display driver that can generate first and second gate clock signals including first and second voltage transitions, respectively, and a gate drivers that can receive the first and second gate clock signals via gate clock lines and that can apply gate line signals, based on the gate clock signals, to the gate lines. A first voltage change generated in a common electrode line of the touch screen by the first voltage transition can be reduced by a second voltage change generated in the common electrode by the second voltage transition.
20 Citations
19 Claims
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1. A gate driver system of a touch screen, comprising:
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a plurality of gate lines connected to display pixel transistors; a display driver that generates first and second gate clock signals including first and second voltage transitions, respectively; and a plurality of gate drivers that receive the first and second gate clock signals via gate clock lines and that apply gate line signals, based on the gate clock signals, to the gate lines, wherein a first voltage change generated in a common electrode line of the touch screen by the first voltage transition is reduced by a second voltage change generated in the common electrode by the second voltage transition. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method of scanning gate lines during a display operation of a touch screen, the touch screen including a common electrode line capacitively coupled to first and second gate lines of the touch screen, the method comprising:
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applying, to the first gate line, a first gate signal that generates a first voltage change in the common electrode line; and applying, to the second gate line, a second gate signal that generates a second voltage change that reduces the first voltage change in the common electrode line. - View Dependent Claims (12, 13, 14, 15, 16, 17)
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18. A touch screen comprising:
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a plurality of display pixels including a first display pixel including a first transistor with a gate connected to a first gate line of a plurality of gate lines, a source connected to one of a plurality of data lines, and a drain connected to a first pixel electrode, the pixel electrode being capacitively coupled to a first common electrode line; a second display pixel including a second transistor with a gate connected to a second gate line of the plurality of gate lines, a source connected to one of the plurality of data lines, and a drain connected to a second pixel electrode, the second pixel electrode being capacitively coupled to the first common electrode line, wherein the first common electrode line is capacitively coupled to the first and second gate lines; a first gate driver that applies a first gate signal to the first gate line based on a first gate clock signal received from a first gate clock line, the first gate clock signal including a first voltage transition that switches the first transistor from an on state to an off state, wherein the first voltage transition generates a corresponding first voltage change in the first common electrode line for a first period of time; and a second gate driver that applies a second gate signal to the second gate line based on a second gate clock signal received from a second gate clock line, the second gate clock signal including a second voltage transition that switches the second transistor from an off state to an on state, wherein the second gate clock signal is timed such that the second voltage transition generates a corresponding second voltage change in the first common electrode line during the first time period. - View Dependent Claims (19)
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Specification