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SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME

  • US 20110267892A1
  • Filed: 04/28/2011
  • Published: 11/03/2011
  • Est. Priority Date: 04/29/2010
  • Status: Active Grant
First Claim
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1. A semiconductor memory device, comprising:

  • a memory string coupled to a bit line;

    a page buffer configured to sense a sensing current of the bit line in an erase verification operation or a program verification operation; and

    a sensing control circuit configured to differently set a level of the sensing current in the erase verification operation and the program verification operation in order to sense the threshold voltage level of a selected memory cell of the memory string.

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