Reduced Defectivity in Contacts of a Semiconductor Device Comprising Replacement Gate Electrode Structures by Using an Intermediate Cap Layer
First Claim
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1. A method, comprising:
- forming a dielectric cap layer above a gate electrode structure and an interlayer dielectric material of a transistor formed above a semiconductor region, said gate electrode structure being laterally embedded in the interlayer dielectric material and comprising a high-k dielectric material and an electrode metal;
forming a contact opening laterally offset from said gate electrode structure so as to extend through said dielectric cap layer and said interlayer dielectric material;
forming a contact material in said contact opening;
removing an excess portion of said contact material so as to expose said dielectric cap layer; and
performing a removal process so as to expose said electrode metal of said gate electrode structure.
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Abstract
Superior contact elements may be formed in semiconductor devices in which sophisticated replacement gate approaches may be applied. To this end, a dielectric cap layer is provided prior to patterning the interlayer dielectric material so that any previously created cracks may be reliably sealed prior to the deposition of the contact material, while the removal of any excess portion thereof may be performed without an undue interaction with the electrode metal of the gate electrode structures. Consequently, a significantly reduced defect rate may be achieved.
22 Citations
20 Claims
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1. A method, comprising:
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forming a dielectric cap layer above a gate electrode structure and an interlayer dielectric material of a transistor formed above a semiconductor region, said gate electrode structure being laterally embedded in the interlayer dielectric material and comprising a high-k dielectric material and an electrode metal; forming a contact opening laterally offset from said gate electrode structure so as to extend through said dielectric cap layer and said interlayer dielectric material; forming a contact material in said contact opening; removing an excess portion of said contact material so as to expose said dielectric cap layer; and performing a removal process so as to expose said electrode metal of said gate electrode structure. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method, comprising:
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forming an electrode metal in an opening of a gate electrode structure of a transistor, said gate electrode structure being laterally embedded in a dielectric material; removing an excess portion of said electrode metal by performing a first removal process; forming a dielectric cap layer above said electrode metal and said dielectric material; forming a contact opening in said dielectric cap layer and said dielectric material without exposing said electrode metal, said contact opening connecting to one of a drain region and a source region; forming a contact metal in said contact opening and above said dielectric cap layer; removing an excess portion of said contact metal by performing a second removal process; and exposing said electrode metal by removing a portion of the dielectric cap layer. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17)
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18. A method, comprising:
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forming a dielectric etch mask above a dielectric material and an electrode metal of a gate electrode structure laterally embedded in said dielectric material, said etch mask covering said electrode metal and comprising a mask opening defining a lateral position and size of a contact opening; forming said contact opening in said dielectric material by using said etch mask; filling said contact opening with a conductive material in the presence of said etch mask; and removing said etch mask at least from above said electrode metal. - View Dependent Claims (19, 20)
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Specification