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HERMETIC WAFER-TO-WAFER BONDING WITH ELECTRICAL INTERCONNECTION

  • US 20110270099A1
  • Filed: 04/28/2011
  • Published: 11/03/2011
  • Est. Priority Date: 04/28/2010
  • Status: Abandoned Application
First Claim
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1. A method for forming an integrated circuit comprising:

  • providing a first substrate;

    forming a first conductive material that is entirely recessed relative to a surface of the first substrate;

    providing a second substrate;

    forming a second conductive material that is entirely recessed relative to a surface of the second substrate; and

    reflowing at least one of the first and second conductive material to form a single reflowed interconnect between the first and second substrate.

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