Efficient Multipliers Based on Multiple-Radix Representations
First Claim
1. A method for multiplying integers in an integrated circuit, comprising:
- splitting in an integrated circuit a first integer into a plurality of binary blocks;
encoding the plurality of binary blocks into a plurality of encoded blocks;
producing a plurality of multiples of a second integer;
producing a plurality of partial results from the plurality of encoded blocks and the plurality of multiples;
selectively shifting the plurality of partial results to generate a plurality of shifted partial results; and
adding at least one of the plurality of partial results and one of the shifted partial results to create the product of the first integer and the second integer.
1 Assignment
0 Petitions
Accused Products
Abstract
Methods and apparatus for multiplying integers using a double-base numbering system are presented. In one embodiment, a method includes splitting a first integer into a plurality of binary blocks. The method may also include encoding the plurality of binary blocks into a plurality of encoded blocks in a double-base numbering system. Additionally, the method may include producing a plurality of multiples of a second integer. The method may also include producing a plurality partial results. The method may include selectively shifting the plurality of partial results to generate a plurality of shifted partial results, and adding the plurality of partial results and the shifted partial results to create the product of a plurality of integers.
12 Citations
26 Claims
-
1. A method for multiplying integers in an integrated circuit, comprising:
-
splitting in an integrated circuit a first integer into a plurality of binary blocks; encoding the plurality of binary blocks into a plurality of encoded blocks; producing a plurality of multiples of a second integer; producing a plurality of partial results from the plurality of encoded blocks and the plurality of multiples; selectively shifting the plurality of partial results to generate a plurality of shifted partial results; and adding at least one of the plurality of partial results and one of the shifted partial results to create the product of the first integer and the second integer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
-
-
14. An apparatus comprising:
-
a splitter configured to convert a first integer into a plurality of binary blocks; an encoder coupled to the splitter, the encoder configured to encode the plurality of binary blocks into a plurality of encoded blocks; a processing module configured to produce a plurality of multiples of a second integer; a partial results circuit coupled to the encoder and the processing module, the partial results circuit configured to produce a plurality partial results; a shifter coupled to the partial results block, the shifter configured to selectively shift the plurality of partial results to generate a plurality of shifted partial results; and an adder coupled to the shifter, the adder configured to add the plurality of partial results and the shifted partial results to create the product of a plurality of integers. - View Dependent Claims (15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26)
-
Specification