APPROACH FOR DATA INTEGRITY IN AN EMBEDDED DEVICE ENVIRONMENT

• US 20110271144A1
• Filed: 04/30/2010
• Published: 11/03/2011
• Est. Priority Date: 04/30/2010
• Status: Active Grant

• Current Assignee: Honeywell International Inc.
• Original Assignee: Honeywell International Inc.
• Inventors: Sublett, John, James, Owen Michael, Giorgis, Daniel
• Granted Patent: US 8,448,023 B2
• Time in Patent Office: Days
• US Class Current: 714/14
• CPC Class Codes: G06F 11/1441 Resetting or repowering
• CPC Class Codes: G06F 11/2015 Redundant power supplies power supply failure G06F1/30
• CPC Class Codes: G06F 12/0866 for peripheral storage systems, e.g. disk cache
• CPC Class Codes: G06F 2212/214 Solid state disk

Abstract

A system for providing data integrity in an embedded device environment. One approach is operating an embedded control engine with non-battery backup power and providing data backup with inexpensive memory. Just data having changes may be provided to a volatile memory such as an SRAM module. After an accumulation of a certain amount of data, the data may be moved onto a relatively larger non-volatile memory, such as an NVRAM module or other type of flash memory. Non-battery backup power may maintain the SRAM module for a period after a power loss, so as to retain data. After restoration of power, data from NVRAM and SRAM modules may be read by the backup service to recreate the last known state of the control engine before the power loss.

Claims

1. A data backup approach for an embedded device upon loss of power without a battery backup, comprising:

a device having data;

a backup service running on the device;

a volatile memory cache available to the service;

a non-volatile memory available to the cache; and

a non-battery backup power source connected to the cache; and

wherein;

data are saved synchronously from the backup service to the cache when the data incur one or more changes;

the data with one or more changes are moved from the cache to the non-volatile memory;

upon a loss of primary power, data in the cache are retained in the cache; and

upon return of primary power, the data are read from the non-volatile memory and the cache by the service.

2. The system of claim 1, wherein upon return of primary power, the backup service reads data from the volatile memory and non-volatile memory and provides reassembled data.

3. The system of claim 2, wherein the reassembled data is for recreating a last known state of the device before a loss of primary power.

4. The system of claim 1, wherein:

the volatile memory cache is an SRAM module; and

the non-volatile memory is an NVRAM module.

5. The system of claim 4, wherein:

the SRAM module is partitioned into two or more blocks;

a first block of data can be flushed to the NVRAM module; and

a second block may be swapped in place of the first block for receiving data from the backup service while the first block of data is being flushed to the NVRAM module.

6. The system of claim 4, wherein:

if a datum changes value for the first time, the datum is entered in the SRAM module as a new record; and

if the datum changes value again, then the datum is entered in the SRAM module as an updated or appended record.

7. The system of claim 4, wherein a record is created only for a datum, having a change, of a set of data, for storage in the SRAM module.

8. The system of claim 4, wherein:

records from data that have one or more changes are writes to the SRAM module;

the writes proceed until an SRAM block is full; and

the contents of a full SRAM block are written to the NVRAM module.

9. The system of claim 1, wherein the non-battery backup power source comprises a capacitor.

10. A method for providing data backup of an embedded device for a power interrupt without backup batteries, comprising:

providing a backup service for data points of a device;

saving a data point which has a change of value to a volatile memory cache;

saving the data point from the cache to a non-volatile memory;

after a power loss and restoration, reading data points from the cache and the non-volatile memory by the backup service; and

recreating a last known state of the device by the backup service with the data points read from the cache and the non-volatile memory upon the power restoration.

11. The method of claim 10, wherein the cache comprises an SRAM module having a non-battery electrical power source.

12. The method of claim 10, wherein the non-volatile memory comprises an NVRAM module.

13. The method of claim 11, wherein the SRAM module is partitioned into two or more blocks.

14. The method of claim 13, wherein:

one or more data points which have changes of values are saved to a first block of the two or more blocks of the SRAM module; and

additional one or more data points are saved to a second block of the two or more blocks of the SRAM module if the one or more data points in the first block are being flushed out to the non-volatile memory.

15. The method of claim 10, wherein:

if a data point has a change of value for a first time, it is saved in the cache as a first record; and

if the data point has a change of value for a second time, then the first record is updated with the change of value.

16. The method of claim 10, wherein:

data points having a change of value are saved to the cache;

after a certain portion of the cache is full, the data points of the cache are saved to the non-volatile memory;

each of the data points saved to the non-volatile memory is tagged with a monotonically sequenced counter to reflect a time at which the data point was saved to the non-volatile memory; and

the backup service reads data points from the non-volatile memory and reassembles the data points to a last known state of the device with a facilitation of the monotonically sequenced counter, upon a power restoration.

17. The method of claim 10, wherein a data point storage size of the non-volatile memory is one or more orders of magnitude greater than a data point storage size of the cache.

18. A system for data integrity in an embedded device environment, comprising:

an embedded device having persistent data points;

a backup service running on the embedded device;

a volatile memory available to the service; and

a non-volatile memory available to the volatile memory; and

wherein;

the volatile memory comprises a cache between the service and the non-volatile memory;

when a data point has a change of value, then the data point is saved by the service to the volatile memory;

after consuming a certain portion of the volatile memory, the data points are flushed from the volatile memory to the non-volatile memory; and

a non-battery device provides electrical energy to permit the volatile memory to retain data points upon a power loss.

19. The system of claim 18, wherein a data point having a change is synchronously saved to the volatile memory.

20. The system of claim 18, wherein:

the volatile memory comprises two or more blocks; and

while data points are flushed from a first block of the volatile memory to the non-volatile memory, a second cache is available for saving one or more data points from the service.