RECONFIGURABLE OUTPHASING CHIREIX AMPLIFIERS AND METHODS

• US 20110273234A1
• Filed: 05/04/2010
• Published: 11/10/2011
• Est. Priority Date: 05/04/2010
• Status: Active Grant

• Current Assignee: Ampleon Netherlands B.V. (Ampleon Coöperatief UA)
• Original Assignee: NXP B.V. (NXP Semiconductors NV)
• Inventors: Vromans, Jan Sophia, Acar, Mustafa, van der Heijden, Mark Pieter
• Granted Patent: US 8,203,386 B2
• Time in Patent Office: Days
• US Class Current: 330/295
• CPC Class Codes: H03F 1/0294 using vector summing of two or more constant amplitude phase-modulated signals
• CPC Class Codes: H03F 1/565 using inductive elements
• CPC Class Codes: H03F 2200/204 A hybrid coupler being used at the output of an amplifier circuit
• CPC Class Codes: H03F 2200/387 A circuit being added at the output of an amplifier to adapt the output impedance of the amplifier
• CPC Class Codes: H03F 2200/451 the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 3/195 in integrated circuits
• CPC Class Codes: H03F 3/24 of transmitter output stages

Abstract

Various embodiments relate to a reconfigurable integrated digital Chireix out-phasing power amplifier for use in high power base stations is described and a related method of said design. The power amplifier may include a power transistor circuitry having plurality of power transistors and shunt-series circuitry (L₁C₁, L₂C₂), a broadband combiner having Chireix compensation elements, and an impedance matching filter. The power transistor circuitry, the broadband combiner, and the impedance matching filter are integrated in a unified package. In one embodiment, the power amplifier is implemented in a real switch-mode to facilitate integration of the Chireix compensation elements so as to make the Chireix power amplifier tunable. A method of driving Chireix power amplifier structure is also described.

Claims

1. An integrated digital Chireix power amplifier device, comprising:

a power transistor circuit having a plurality of power transistors and a shunt-series circuit;

a broadband combiner having Chireix compensation elements; and

an impedance matching filter, wherein the power transistor circuit, the broadband combiner, and the impedance matching filter are integrated in a unified package.

2. The power amplifier device of claim 1, wherein the power amplifier is implemented in a real switch-mode for integration of the Chireix compensation elements in the unified package so as to make the power amplifier device tunable.

3. The power amplifier device of claim 1, wherein the broadband combiner is implemented using coupled transmission lines.

4. The power amplifier device of claim 1, wherein the broadband combiner comprises variable capacitors so as to enable reconfiguring the power amplifier.

5. The power amplifier device of claim 4, wherein tuning settings of the variable capacitors are established when installing a base station amplifier.

6. The power amplifier device of claim 4, wherein tuning settings of the variable capacitors are established by selecting a fixed inductance-capacitance combination.

7. The power amplifier of device claim 1, wherein the duty cycle settings of the plurality of power transistors are established when installing a base station amplifier including the power amplifier.

8. The power amplifier of claim 1, wherein the broadband combiner comprises a fixed broadband network and further wherein the power amplifier can be reconfigured for different frequency bands by adjusting the duty cycle of at least one of the plurality of power transistors.

9. The power amplifier device of claim 1, where the broadband combiner comprises a Marchand balun having a phase angle of less than 90 degrees.

10. The power amplifier device of claim 9, wherein the broadband combiner is configured to provide a constant real impedance level across a bandwidth of interest, and further wherein the broadband combiner further comprises a low-pass LC filter provided at an output node of the broadband combiner to provide additional impedance matching and establishing quality factors for a class-E operation of the power amplifier.

11. The power amplifier device of claim 10, wherein varying an electrical length of a respective one of the individual transmission lines together with variable capacitor settings establishes a required shunt inductance for the class-E operation and Chireix compensation.

12. The power amplifier device of claim 1, wherein the asymmetry is implemented by at least one of (a) having differing lengths of coupled transmission line sections, and (b) by making impedance of coupled transmission line sections un-equal.

13. A cellular base station terminal having a digital Chireix power amplifier structure, the power amplifier structure comprising:

a power transistor circuit having a plurality of power transistors and a shunt-series circuitry;

a broadband combiner having Chireix compensation elements; and

an impedance matching filter, wherein the power transistor circuit the broadband combiner, and the impedance matching filter are integrated in a unified package.

14. The cellular base station of claim 13, wherein the power amplifier is implemented in a real switch-mode for integration of the Chireix compensation elements in the unified package so as to make the power amplifier device tunable.

15. The cellular base station of claim 13, wherein the broadband combiner comprises variable capacitors so as to enable reconfiguring the power amplifier.

16. The cellular base station of claim 13, wherein tuning settings of the variable capacitors are established when installing a base station amplifier.

17. The cellular based state of claim 13, wherein the tuning settings are established by selecting a fixed inductance-capacitance combination.

18. The cellular base station of claim 13, wherein the duty cycle settings of the plurality of power transistors are established when installing a base station amplifier.

19. The cellular base station of claim 13, wherein the broadband combiner comprises a fixed broadband combiner network, and further wherein the power amplifier can be reconfigured for different frequency bands by adjusting the duty cycle of at least one of the plurality of power transistors.

20. The cellular base station of claim 13, where the broadband combiner comprises a Marchand balun having a phase angle of less than 90 degrees.

21. The cellular base station of claim 18, wherein the broadband combiner is configured to provide a constant real impedance level across a bandwidth of interest, and further wherein the broadband combiner further comprises a low-pass LC filter provided at an output node of the broadband combiner to provide additional impedance matching and establishing quality factors for a class-E operation of the power amplifier.

22. The cellular base station of claim 13, wherein the broadband combiner is implanted using coupled transmission lines, and further wherein varying an electrical length of a respective one of the individual transmission lines together with variable capacitor settings establishes a required shunt inductance for the class-E operation and Chireix compensation.

23. The cellular base station of claim 13, wherein the broadband combiner is configured to be asymmetrical, wherein asymmetry in the broadband combiner is implemented by at least one of (a) having differing lengths of coupled transmission line sections, or (b) by making impedance of coupled transmission line sections unequal.

24. The cellular base station of claim 13, wherein the power transistor circuitry further comprises:

a plurality of drivers, wherein at least one of the drivers in said plurality is a CMOS or BiCMOS or LDMOS driver; and

the plurality of power transistors, wherein at least one of the power transistors in said plurality is a GaN or LDMOS power transistor.

25. A method of driving a Chireix power amplifier structure, the method comprising:

providing a power transistor circuit having a plurality of power transistors and a shunt-series circuit, a broadband combiner having Chireix compensation elements, and an impedance matching filter in a unified package; and

driving variable capacitors in the broadband combiner so as to enable reconfiguring of the power amplifier structure.

26. The method of claim 25, further comprising:

driving the power transistor circuitry in a real switch-mode so as to make the Chireix power amplifier tunable by adjusting the duty cycle of the switch power transistor.

27. The method of claim 25, wherein the driving step comprises establishing tuning settings of the variable capacitors by selecting at least one of a fixed inductance capacitance combination.

28. The method of claim 27, further comprising:

reconfiguring the broadband combiner for operation at different frequency bands by adjusting the duty cycle of at least one of the plurality of power transistors.

29. The method of claim 25, wherein the asymmetry is implemented by at least one of (a) varying lengths of coupled transmission line sections of the coupled transmission lines, and (b) by making impedance of the coupled transmission line sections un-equal.