Data processing apparatus and method for testing a circuit block using scan chains
First Claim
1. A data processing apparatus comprising:
- a circuit block to be tested;
a plurality of scan chains, each scan chain in said plurality providing a mechanism for providing input test data to, and receiving output test data from, at least a portion of the circuit block during a test mode of operation;
an input interface for receiving compressed input test data;
configurable decompression circuitry for supporting a plurality of decompression schemes associated with more than one test generation tool, the configurable decompression circuitry being connected between the input interface and the plurality of scan chains; and
configuration circuitry, responsive to a configuration stimulus, to configure the configurable decompression circuitry to implement a selected decompression scheme from said plurality, such that on receipt of the compressed input test data from the input interface the configurable decompression circuitry applies the selected decompression scheme to the compressed input test data to produce the input test data to be provided to said plurality of scan chains.
1 Assignment
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Accused Products
Abstract
A data processing apparatus comprises a circuit block to be tested, and a plurality of scan chains, each scan chain providing a mechanism for providing input test data to, and receiving output test data from, at least a portion of the circuit block during a test mode of operation. Configurable decompression circuitry is provided for supporting a plurality of decompression schemes associated with more than one test generation tool, and configuration circuitry is responsive to a configuration stimulus to configure the configurable decompression circuitry to implement a selected decompression scheme. Thereafter, on receipt of compressed input test data, the configurable decompression circuitry applies the selected decompression scheme to the compressed input test data to produce the input test data to be provided to the plurality of scan chains. Configurable compression circuitry can also be provided in a similar manner, with the configuration stimulus being used to configure the configurable compression circuitry to implement a selected compression scheme to be applied to the output test data in order to produce compressed output test data to be issued from an output interface. Such a mechanism provides a particularly flexible approach for supporting compression and decompression schemes in association with the data input to, and output from, the plurality of scan chains.
11 Citations
21 Claims
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1. A data processing apparatus comprising:
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a circuit block to be tested; a plurality of scan chains, each scan chain in said plurality providing a mechanism for providing input test data to, and receiving output test data from, at least a portion of the circuit block during a test mode of operation; an input interface for receiving compressed input test data; configurable decompression circuitry for supporting a plurality of decompression schemes associated with more than one test generation tool, the configurable decompression circuitry being connected between the input interface and the plurality of scan chains; and configuration circuitry, responsive to a configuration stimulus, to configure the configurable decompression circuitry to implement a selected decompression scheme from said plurality, such that on receipt of the compressed input test data from the input interface the configurable decompression circuitry applies the selected decompression scheme to the compressed input test data to produce the input test data to be provided to said plurality of scan chains. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
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17. A data processing apparatus comprising:
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a circuit block to be tested; a plurality of scan chains, each scan chain in said plurality providing a mechanism for providing input test data to, and receiving output test data from, at least a portion of the circuit block during a test mode of operation; an output interface for outputting compressed output test data; configurable compression circuitry for supporting a plurality of compression schemes associated with more than one test generation tool, the configurable compression circuitry being connected between the plurality of scan chains and the output interface; and configuration circuitry, responsive to a configuration stimulus, to configure the configurable compression circuitry to implement a selected compression scheme from said plurality, such that on receipt of the output test data from said plurality of scan chains the configurable compression circuitry applies the selected compression scheme to the output test data to produce said compressed output test data to be provided to said output interface.
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18. A method of testing a circuit block within a data processing apparatus, comprising the steps of:
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(a) providing a plurality of scan chains, each scan chain in said plurality providing a mechanism for providing input test data to, and receiving output test data from, at least a portion of the circuit block; (b) receiving compressed input test data; (c) responsive to a configuration stimulus, configuring configurable decompression circuitry to implement a selected decompression scheme from a plurality of decompression schemes associated with more than one test generation tool and supported by the configurable decompression circuitry; (d) on receipt by the configurable decompression circuitry of the compressed input test data received at said step (b), applying the selected decompression scheme to the compressed input test data to produce the input test data; and (e) providing to said plurality of scan chains the input test data produced at said step (d). - View Dependent Claims (19, 20)
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21. A data processing apparatus comprising:
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circuit means for being tested; a plurality of scan chain means, each scan chain means in said plurality for providing a mechanism for providing input test data to, and receiving output test data from, at least a portion of the circuit means during a test mode of operation; input interface means for receiving compressed input test data; configurable decompression means for supporting a plurality of decompression schemes associated with more than one test generation tool, the configurable decompression means being connected between the input interface means and the plurality of scan chain means; and configuration means, responsive to a configuration stimulus, for configuring the configurable decompression means to implement a selected decompression scheme from said plurality, such that on receipt of the compressed input test data from the input interface means the configurable decompression means applies the selected decompression scheme to the compressed input test data to produce the input test data to be provided to said plurality of scan chain means.
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Specification