SYSTEM AND METHOD FOR RC CALIBRATION USING PHASE AND FREQUENCY

• US 20110279175A1
• Filed: 05/11/2010
• Published: 11/17/2011
• Est. Priority Date: 05/11/2010
• Status: Active Grant

• Current Assignee: Global UniChip Corp., Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: CHEN, Jia-Liang, KUO, Feng Wei, TSAI, Tsung-Hsien
• Granted Patent: US 8,314,652 B2
• Time in Patent Office: Days
• US Class Current: 327/553
• CPC Class Codes: H03H 11/12 using amplifiers with feedback H03H11/0422 , H03H11/08, H03H11/10 take precedence
• CPC Class Codes: H03H 11/1291 Current or voltage controlled filters
• CPC Class Codes: H03H 2210/025 Capacitor
• CPC Class Codes: H03H 2210/036 Stepwise
• CPC Class Codes: H03H 2210/04 Filter calibration method

Abstract

An RC filter is calibrated to a desired cutoff frequency by initializing the filter with a cutoff frequency. An input signal is filtered by the RC filter to provide a filter output signal having phase and frequency values. The cutoff frequency of the RC filter is adjusted based on the phase and frequency values of the filter output signal if the phase and frequency values do not satisfy a predetermined condition. The filtering and adjusting are repeated until the phase and frequency values of the filter output signal satisfy the predetermined condition. A calibration apparatus has a frequency generator, a resistor-capacitor (RC) filter, a phase comparator, a frequency detector, and a state machine. The phase comparator, frequency detector, and state machine are configured to calibrate the RC filter to a cutoff frequency specified by the reference signal based on a filter output signal of the RC filter.

Claims

1. A method of calibrating a resistor-capacitor (RC) filter to a desired cutoff frequency, the method comprising:

initializing the RC filter with a cutoff frequency;

filtering an input signal, indicative of the desired cutoff frequency, with the RC filter to provide a filter output signal having phase and frequency values;

adjusting the cutoff frequency of the RC filter, based on the phase and frequency values of the filter output signal, if the phase and frequency values do not satisfy a predetermined condition; and

repeating the filtering and adjusting until the phase and frequency values of the filter output signal satisfy the predetermined condition.

2. The method of claim 1 wherein adjusting the cutoff frequency of the RC filter includes stepping the cutoff frequency in a single direction.

3. The method of claim 2 wherein stepping the cutoff frequency includes increasing the cutoff frequency.

4. The method of claim 3 wherein the cutoff frequency is increased in a range between 1 and 10 MHz until the predetermined condition is satisfied.

5. The method of claim 1 wherein the predetermined condition is that the input signal is locked in frequency to the filter output signal and the filter output signal lags the input signal in phase by at least a specified threshold.

6. The method of claim 5 wherein the RC filter is a lowpass filter circuit.

7. The method of claim 6 wherein the specified threshold is 90 degrees.

8. A calibration apparatus comprising:

a frequency generator configured to provide a reference signal;

a resistor-capacitor (RC) filter coupled to receive the reference signal and provide a filter output signal;

a phase comparator coupled to receive the reference signal and the filter output signal;

a frequency detector coupled to receive the reference signal and the filter output signal; and

a state machine;

wherein the phase comparator, the frequency detector, and the state machine are configured to calibrate a cutoff frequency of the RC filter to a value specified by the reference signal based on the filter output signal of the RC filter.

9. The calibration apparatus of claim 8 wherein the state machine comprises a counter configured to be decremented to step the cutoff frequency of the RC filter higher from an initial value between 1 and 10 MHz.

10. The calibration apparatus of claim 8, wherein the apparatus is included in a radio frequency (RF) tuner for RC calibration in the RF tuner.

11. The calibration apparatus of claim 8 wherein the RC filter is a lowpass filter circuit.

12. The calibration apparatus of claim 11 wherein the lowpass filter circuit is an 8th order Chebyshev filter circuit.

13. The calibration apparatus of claim 12 wherein the RC filter is configured to filter the reference signal and the RC filter is configured to be calibrated by decrementing the counter to vary a capacitance of a variable capacitor of the RC filter until the reference signal is locked in frequency to the output of the RC filter and the output of the RC filter lags the reference signal in phase by at least a specified threshold.

14. The calibration apparatus of claim 13 wherein the specified threshold is 90 degrees.

15. The calibration apparatus of claim 8 wherein the output of the RC filter is a quadrature component.

16. The calibration apparatus of claim 8 wherein the RC filter has a critical dimension associated with a 40 nm CMOS process.

17. A digital RC calibration circuit comprising:

a phase comparator configured to receive a reference signal and a quadrature output of an RC filter;

a frequency detector configured to receive the reference signal and the quadrature output of the RC filter; and

a state machine configured to process outputs of the phase comparator and the frequency detector, respectively, to provide a capacitor code to calibrate the RC filter to a desired cutoff frequency.

18. The digital RC calibration circuit of claim 17 wherein the phase comparator comprises:

a first stage of three D flip-flops, a D input of each flip-flop in the first stage coupled to the in-phase output of the RC filter, and a CLK input of each flip-flop in the first stage coupled to an input to the RC filter shifted in phase by a predetermined offset;

a second stage of three D flip-flops, a D input of each flop in the second stage coupled to a Q output of a corresponding flip-flop in the first stage, and a CLK input of each flip-flop in the second stage coupled to the input to the RC filter, shifted in phase by 90 degrees and inverted; and

a three-bit majority circuit receiving as inputs a Q output from each of the three flip-flops in the second stage and providing as an output of the phase comparator a majority bit among the three second-stage Q outputs.

19. The digital RC calibration circuit of claim 18 wherein the predetermined offset is a phase shift of 90 degrees.

20. The RC calibration circuit of claim 17 wherein the frequency detector comprises:

a first N-bit counter having a CLEAR input coupled to a clock, and having a CLK input coupled to the input to the RC filter;

a second N-bit counter having a CLEAR input coupled to the clock, and having a CLK input coupled to the in-phase output of the RC filter; and

an N-bit comparator providing an output indicative of whether outputs of the first and second N-bit counters are equal.