MEMORY DEVICE AND SEMICONDUCTOR DEVICE
First Claim
1. A memory device comprising:
- a memory cell comprising;
a transistor including an oxide semiconductor layer;
a capacitor in electrical contact with the transistor; and
a light-blocking layer,wherein at least one of electrodes of the capacitor has a light-blocking property,wherein the oxide semiconductor layer is sandwiched between the one of electrodes and the light-blocking layer, andwherein at least one of the light-blocking layer and the one of electrodes covers a channel formation region of the oxide semiconductor layer in order to prevent light from entering the channel formation region.
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Accused Products
Abstract
One object is to propose a memory device in which a period in which data is held can be ensured and memory capacity per unit area can be increased. The memory device includes a memory element, a transistor including an oxide semiconductor in an active layer for control of accumulating, holding, and discharging charge in the memory element, and a capacitor connected to the memory element. At least one of a pair of electrodes of the capacitor has a light-blocking property. Further, the memory device includes a light-blocking conductive film or a light-blocking insulating film. The active layer is positioned between the electrode having a light-blocking property and the light-blocking conductive film or the light-blocking insulating film.
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Citations
27 Claims
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1. A memory device comprising:
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a memory cell comprising; a transistor including an oxide semiconductor layer; a capacitor in electrical contact with the transistor; and a light-blocking layer, wherein at least one of electrodes of the capacitor has a light-blocking property, wherein the oxide semiconductor layer is sandwiched between the one of electrodes and the light-blocking layer, and wherein at least one of the light-blocking layer and the one of electrodes covers a channel formation region of the oxide semiconductor layer in order to prevent light from entering the channel formation region. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A memory device comprising:
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a memory cell comprising; a first transistor including an oxide semiconductor layer; a second transistor; a capacitor; and a light-blocking layer, wherein the first transistor is configured to control supply of a potential to a gate electrode of the second transistor, wherein the capacitor is configured to hold the potential of the gate electrode of the second transistor, wherein at least one of electrodes of the capacitor has a light-blocking property, wherein the oxide semiconductor layer is sandwiched between the one of electrodes and the light-blocking layer, and wherein at least one of the light-blocking layer and the one of electrodes covers a channel formation region of the oxide semiconductor layer in order to prevent light from entering the channel formation region. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18)
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19. A memory device comprising:
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a memory cell comprising; a transistor including an oxide semiconductor layer; a capacitor; and a light-blocking layer, wherein the transistor is configured to hold charge of the capacitor, wherein at least one of electrodes of the capacitor has a light-blocking property, wherein the oxide semiconductor layer is sandwiched between the one of electrodes and the light-blocking layer, and wherein at least one of the light-blocking layer and the one of electrodes covers a channel formation region of the oxide semiconductor layer in order to prevent light from entering the channel formation region. - View Dependent Claims (20, 21, 22, 23, 24, 25, 26, 27)
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Specification