FIELD EFFECT TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME

• US 20110291092A1
• Filed: 05/24/2011
• Published: 12/01/2011
• Est. Priority Date: 06/01/2010
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Takemura, Yasuhiko
• Granted Patent: US 8,895,375 B2
• Time in Patent Office: Days
• US Class Current: 257/57
• CPC Class Codes: H01L 21/02266 deposition by physical ablation of a target, e.g. sputtering, reactive sputtering, physical vapour deposition or pulsed laser deposition
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02614 Transformation of metal, e.g. oxidation, nitridation
• CPC Class Codes: H01L 21/385 using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
• CPC Class Codes: H01L 21/477 Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering H01L21/38 - H01L21/449 and H01L21/461 - H01L21/475 take precedence
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 27/13 combined with thin-film or thick-film passive components
• CPC Class Codes: H01L 29/242 AIBVI or AIBVII compounds, e.g. Cu2O, Cu I H01L29/247 takes precedence
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

Provided is a novel structure of a field effect transistor using a metal-semiconductor junction. The field effect transistor includes a wiring which is provided over a substrate and also functions as a gate electrode; an insulating film which is provided over the wiring, has substantially the same shape as the wiring, and also functions as a gate insulating film; a semiconductor layer which is provided over the insulating film and includes an oxide semiconductor and the like; an oxide insulating layer which is provided over the semiconductor layer and whose thickness is 5 times or more as large as the sum of the thickness of the insulating film and the thickness of the semiconductor layer or 100 nm or more; and wirings which are connected to the semiconductor layer through openings provided in the oxide insulating layer.

Claims

1. A field effect transistor comprising:

a substrate;

a first wiring over the substrate;

an insulating film over the first wiring;

a semiconductor layer over the insulating film;

an oxide insulating layer over the semiconductor layer; and

a second wiring over the oxide insulating layer, the second wiring being in contact with the semiconductor layer through an opening in the oxide insulating layer,

wherein the insulating film comprises substantially the same shape as the first wiring.

2. The field effect transistor according to claim 1, wherein the semiconductor layer comprises an oxide semiconductor.

3. The field effect transistor according to claim 2, wherein the semiconductor layer contains indium and zinc.

4. The field effect transistor according to claim 1, wherein a thickness of the oxide insulating layer is 5 times or more as large as a sum of a thickness of the insulating film and a thickness of the semiconductor layer.

5. The field effect transistor according to claim 1, wherein a thickness of the oxide insulating layer is 100 nm or more.

6. The field effect transistor according to claim 1, wherein an edge of the semiconductor layer is placed inside an edge of the insulating film

7. The field effect transistor according to claim 1, wherein the opening overlaps with the semiconductor layer.

8. The field effect transistor according to claim 1, wherein the second wiring is directly in contact with a surface of the semiconductor layer.

9. A field effect transistor comprising:

a substrate;

a first wiring over the substrate;

a first insulating film over the first wiring;

a semiconductor layer over the first insulating film;

a second insulating film over the semiconductor layer;

an oxide insulating layer over the second insulating layer; and

a second wiring over the oxide insulating layer, the second wiring being in contact with the semiconductor layer through an opening in the oxide insulating layer,

wherein the first insulating film comprises substantially the same shape as the first wiring.

10. The field effect transistor according to claim 9, wherein the semiconductor layer comprises an oxide semiconductor.

11. The field effect transistor according to claim 10, wherein the semiconductor layer contains indium and zinc.

12. The field effect transistor according to claim 9, wherein a thickness of the oxide insulating layer is 5 times or more as large as a sum of a thickness of the first insulating film and a thickness of the semiconductor layer.

13. The field effect transistor according to claim 9, wherein a thickness of the oxide insulating layer is 100 nm or more.

14. The field effect transistor according to claim 9, wherein an edge of the semiconductor layer is placed inside an edge of the first insulating film.

15. The field effect transistor according to claim 9, wherein the opening overlaps with the semiconductor layer.

16. The field effect transistor according to claim 9, wherein the second wiring is directly in contact with a surface of the semiconductor layer.

17. The field effect transistor according to claim 9, wherein the second insulating film comprises substantially the same shape as the semiconductor layer.

18. A method for manufacturing a field effect transistor comprising the steps of:

forming a first conductive layer over a substrate;

forming an insulating film over the first conductive layer;

processing the insulating film into a predetermined shape;

processing the first conductive layer into substantially the same shape as the insulating film;

forming a semiconductor layer over the insulating film;

forming an oxide insulating layer over the semiconductor layer;

providing an opening reaching the semiconductor layer in the oxide insulating layer; and

forming a second conductive layer covering the oxide insulating layer.

19. The method for manufacturing a field effect transistor, according to claim 18, further comprising a step of:

heating the oxide insulating layer at a temperature which is 200°

C. or higher.

20. The method for manufacturing a field effect transistor, according to claim 18, further comprising a step of:

forming the oxide insulating layer by a sputtering method.

21. The method for manufacturing a field effect transistor, according to claim 18, further comprising a step of:

etching the insulating film successively after the first conductive layer is etched.

22. The method for manufacturing a field effect transistor, according to claim 18, further comprising a step of:

processing the semiconductor layer so that an edge of the semiconductor layer is inside an edge of the insulating film.

23. The method for manufacturing a field effect transistor, according to claim 18, wherein the opening is directly in contact with a surface of the semiconductor layer.

24. The method for manufacturing a field effect transistor, according to claim 18, further comprising a step of:

diffusing oxygen by heating the oxide insulating layer.

25. The method for manufacturing a field effect transistor, according to claim 18, further comprising a step of:

forming the first conductive layer and the insulating film successively without exposing the substrate to the air.