DEVICE AND METHOD FOR FABRICATING THIN SEMICONDUCTOR CHANNEL AND BURIED STRAIN MEMORIZATION LAYER
First Claim
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1. A method for inducing stress in a semiconductor layer, comprising:
- providing a substrate having a dielectric layer formed between a first semiconductor layer and a second semiconductor layer;
processing the second semiconductor layer to form an amorphized material;
depositing a stress layer on the first semiconductor layer; and
annealing the wafer to memorize stress in the second semiconductor layer by recrystallizing the amorphized material.
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Abstract
A device and method for inducing stress in a semiconductor layer includes providing a substrate having a dielectric layer formed between a first semiconductor layer and a second semiconductor layer and processing the second semiconductor layer to form an amorphized material. A stress layer is deposited on the first semiconductor layer. The wafer is annealed to memorize stress in the second semiconductor layer by recrystallizing the amorphized material.
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Citations
25 Claims
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1. A method for inducing stress in a semiconductor layer, comprising:
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providing a substrate having a dielectric layer formed between a first semiconductor layer and a second semiconductor layer; processing the second semiconductor layer to form an amorphized material; depositing a stress layer on the first semiconductor layer; and annealing the wafer to memorize stress in the second semiconductor layer by recrystallizing the amorphized material. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A method for inducing stress in a semiconductor layer, comprising:
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providing a substrate having a dielectric layer formed between a first semiconductor layer and a second semiconductor layer; forming a gate structure for a transistor device on the first semiconductor layer; implanting ions in the second semiconductor layer to form an amorphized material in areas not protected by the gate stack; depositing a stress layer on the gate structure and the first semiconductor layer; and annealing the wafer to memorize stress in the second semiconductor layer by recrystallizing the amorphized material. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20, 21, 22)
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23. A semiconductor device, comprising:
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a substrate having a dielectric layer formed between a first semiconductor layer and a second semiconductor layer; a gate structure for a transistor device formed on the first semiconductor layer; and a memorization layer formed from a recrystallized material of the second semiconductor layer such that stress induced in the recrystallized material induces stress to a device channel formed below the gate structure in the first semiconductor layer. - View Dependent Claims (24, 25)
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Specification