SEMICONDUCTOR DEVICE

• US 20110291241A1
• Filed: 05/26/2011
• Published: 12/01/2011
• Est. Priority Date: 05/27/2010
• Status: Active Grant

• Current Assignee: Fuji Electric Company Limited (Fuji Electric Systems Company Limited)
• Original Assignee: Fuji Electric Company Limited (Fuji Electric Systems Company Limited)
• Inventors: YOSHIKAWA, Koh, Iguchi, Kenichi
• Granted Patent: US 8,278,682 B2
• Time in Patent Office: Days
• US Class Current: 257/544
• CPC Class Codes: H01L 29/0619 with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
• CPC Class Codes: H01L 29/404 Multiple field plate structures
• CPC Class Codes: H01L 29/7395 Vertical transistors, e.g. vertical IGBT

Abstract

A semiconductor device that has a reduced size and exhibits a superior blocking voltage capability. A semiconductor device includes an edge termination structure between an active region and an isolation region, the edge termination structure being composed of an edge termination structure for a forward bias section and an edge termination structure for a reverse bias section. A plurality of field limiting rings (FLRs) and a plurality of field plates (FPs) are provided in the edge termination structure for the forward bias section and the edge termination structure for the reverse bias section. A first forward FP that is the nearest of the plurality of FPs to the edge termination structure for the reverse bias section is formed to extend towards the isolation region side. A first reverse FP that is the nearest of the plurality of FPs to the edge termination structure for the forward bias section is formed to extend towards the active region side. The first reverse FP stops the depletion layer expanding from the active region on application of a forward voltage. The first forward FP stops the depletion layer expanding from the isolation region on application of a reverse voltage.

Claims

1. A semiconductor device comprising:

a semiconductor substrate of a first conductivity type;

an isolation region including an isolation layer of a second conductivity type disposed at a side surface of the semiconductor substrate across the semiconductor substrate from a principal surface to the other principal surface;

an active region;

an edge termination structure disposed between the active region and the isolation region, and encircling the active region, the edge termination structure including a first voltage edge termination section disposed in the side of the active region and a second edge termination structure section disposed in the side of the isolation region;

a plurality of first semiconductor regions of the second conductivity type formed in the front surface region of the semiconductor substrate in the first edge termination structure section and the second edge termination structure section; and

a plurality of conductive films in contact with the first semiconductor regions and formed over an interlayer dielectric film that is selectively formed on the front surface of the semiconductor substrate, wherein

of the plurality of conductive films, a first conductive film formed in the first edge termination structure section and disposed at the nearest to the isolation region side further extends towards the isolation region side than the first semiconductor region with which the first conductive film is in contact by a first length that is a distance from an edge at the isolation region side of the first semiconductor region with which the first conductive film is in contact to an edge at the isolation region side of the first conductive film, and

of the plurality of conductive films, a second conductive film formed in the second edge termination structure section and disposed at the nearest to the active region side further extends towards the active region side than the first semiconductor region with which the second conductive film is in contact by a second length that is a distance from an edge at the active region side of the first semiconductor region with which the second conductive film is in contact to an edge at the active region side of the second conductive film.

2. The semiconductor device according to claim 1, wherein

the edge at the isolation region side of the first conductive film extends towards the isolation region side further than any one of the other conductive films.

3. The semiconductor device according to claim 1, wherein

the edge at the active region side of the second conductive film extends towards the active region side further than any one of the other conductive films.

4. The semiconductor device according to claim 1, wherein

the first length is larger than the second length.

5. The semiconductor device according to claim 1, wherein

the first semiconductor regions in the first edge termination structure section are so formed that distances between adjacent first semiconductor regions are the wider the first semiconductor regions depart the further from the active region.

6. The semiconductor device according to claim 1, wherein

the first semiconductor regions in the second edge termination structure section are so formed that distances between adjacent first semiconductor regions are the wider the first semiconductor regions depart the further from the isolation region.

7. The semiconductor device according to claim 1, wherein

a width of the second edge termination structure section is smaller than a width of the first edge termination structure section.

8. The semiconductor device according to claim 1, wherein

the first length is at least 25 μ

m.

9. The semiconductor device according to claim 1, wherein

the second length is at least 15 μ

m.

10. The semiconductor device according to claim 1, wherein

a channel stopper to stop a depletion layer expanding from the active region side on application of a forward voltage comprises the second conductive film.

11. The semiconductor device according to claim 1, wherein

a channel stopper to stop a depletion layer expanding from the isolation region side on application of a reverse voltage comprises the first conductive film.

12. The semiconductor device according to claim 2, wherein

the edge at the active region side of the second conductive film extends towards the active region side further than any one of the other conductive films.

13. The semiconductor device according to claim 2, wherein

the first length is larger than the second length.

14. The semiconductor device according to claim 2, wherein

the first semiconductor regions in the first edge termination structure section are so formed that distances between adjacent first semiconductor regions are the wider the first semiconductor regions depart the further from the active region.

15. The semiconductor device according to claim 2, wherein

the first semiconductor regions in the second edge termination structure section are so formed that distances between adjacent first semiconductor regions are the wider the first semiconductor regions depart the further from the isolation region.

16. The semiconductor device according to claim 2, wherein

a width of the second edge termination structure section is smaller than a width of the first edge termination structure section.

17. The semiconductor device according to claim 2, wherein

the first length is at least 25 μ

m.

18. The semiconductor device according to claim 2, wherein

the second length is at least 15 μ

m.

19. The semiconductor device according to claim 2, wherein

a channel stopper to stop a depletion layer expanding from the active region side on application of a forward voltage comprises the second conductive film.

20. The semiconductor device according to claim 2, wherein

a channel stopper to stop a depletion layer expanding from the isolation region side on application of a reverse voltage comprises the first conductive film.