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BRANCH AND SWITCH KEY INSTRUCTION IN A MICROPROCESSOR THAT FETCHES AND DECRYPTS ENCRYPTED INSTRUCTIONS

  • US 20110296203A1
  • Filed: 04/21/2011
  • Published: 12/01/2011
  • Est. Priority Date: 05/25/2010
  • Status: Active Grant
First Claim
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1. A microprocessor, comprising:

  • a fetch unit, configured to fetch and decrypt a branch and switch key instruction using first decryption key data; and

    microcode, configured to;

    cause the fetch unit to fetch and decrypt the next sequential instruction after the branch and switch key instruction using the first decryption key data, if the direction of the branch and switch key instruction is not taken; and

    cause the fetch unit to fetch and decrypt a target instruction of the branch and switch key instruction using second decryption key data that is different from the first decryption key data, if the direction of the branch and switch key instruction is taken.

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