BATTERY STATE MONITORING CIRCUIT AND BATTERY DEVICE

• US 20110298463A1
• Filed: 04/22/2011
• Published: 12/08/2011
• Est. Priority Date: 06/04/2010
• Status: Active Grant

• Current Assignee: Ablic Inc. (Minebea Mitsumi, Inc.)
• Original Assignee: Seiko Instruments Incorporated (Seiko Group)
• Inventors: Sano, Kazuaki, Saito, Hiroshi
• Granted Patent: US 8,941,360 B2
• Time in Patent Office: Days
• US Class Current: 324/426
• CPC Class Codes: G01R 31/396 Acquisition or processing of data for testing or for monitoring individual cells or groups of cells within a battery
• CPC Class Codes: H01M 10/482 for several batteries or cells simultaneously or sequentially
• CPC Class Codes: H01M 50/569 Constructional details of current conducting connections for detecting conditions inside cells or batteries, e.g. details of voltage sensing terminals battery terminal connectors with integrated measuring arrangements G01R31/364
• CPC Class Codes: H02J 7/0016 using shunting, discharge or bypass circuits
• CPC Class Codes: H02J 7/00302 Overcharge protection
• CPC Class Codes: H02J 7/00306 Overdischarge protection
• CPC Class Codes: Y02E 60/10 Energy storage using batteries

Abstract

Provided are a battery state monitoring circuit and a battery device, in which, even when one secondary battery becomes an overcharged state or an overdischarged state and then a voltage detection circuit operates, power is not consumed in only the one secondary battery. The battery state monitoring circuit includes: a plurality of voltage detection circuits which are provided for a plurality of secondary batteries, respectively, for detecting voltages of the plurality of secondary batteries; and a current bypass circuit provided in each of the plurality of voltage detection circuits, for allowing an operation current of the each of the plurality of voltage detection circuits to flow into a ground terminal. Therefore, when only one secondary battery becomes an overcharged state or an overdischarged state, the battery device operates so that the power of all the secondary batteries is consumed to prevent voltages between the secondary batteries from being unbalanced.

Claims

1. A battery state monitoring circuit for detecting and controlling states of a plurality of secondary batteries, comprising:

a plurality of voltage detection circuits which are provided for the plurality of secondary batteries, respectively, each for detecting a voltage of a corresponding one of the plurality of secondary batteries; and

a current bypass circuit which is provided in each of the plurality of voltage detection circuits, for allowing an operation current of the each of the plurality of voltage detection circuits to flow into a ground terminal.

2. A battery state monitoring circuit according to claim 1, wherein the current bypass circuit comprises:

a detection transistor for detecting the operation current of the each of the plurality of voltage detection circuits; and

a plurality of current mirror circuits for allowing the operation current of the each of the plurality of voltage detection circuits to flow into the ground terminal based on a current of the detection transistor.

3. A battery state monitoring circuit according to claim 2,

wherein the each of the plurality of voltage detection circuits comprises an overcharge detection circuit comprising:

a voltage dividing circuit which is connected across a corresponding one of the plurality of secondary batteries;

a constant current circuit which is connected to a VDD terminal; and

a first NMOS transistor including a gate connected to an output terminal of the voltage dividing circuit, a drain connected to the constant current circuit, and a source connected to a negative terminal of the corresponding one of the plurality of secondary batteries, and

wherein the current bypass circuit comprises;

a second NMOS transistor as the detection transistor;

a first current mirror circuit which is connected to a source of the second NMOS transistor and the VDD terminal; and

a second current mirror circuit which is connected to the first current mirror circuit, the ground terminal, and the negative terminal of the corresponding one of the plurality of secondary batteries.

4. A battery state monitoring circuit according to claim 2,

wherein the each of the plurality of voltage detection circuits comprises an overdischarge detection circuit comprising:

a voltage dividing circuit which is connected across a corresponding one of the plurality of secondary batteries;

a constant current circuit which is connected to a negative terminal of the corresponding one of the plurality of secondary batteries; and

a first PMOS transistor including a gate connected to an output terminal of the voltage dividing circuit, a drain connected to the constant current circuit, and a source connected to the VDD terminal, and

wherein the current bypass circuit comprises;

a second PMOS transistor as the detection transistor;

a first current mirror circuit which is connected to a drain of the second PMOS transistor and the negative terminal of the corresponding one of the plurality of secondary batteries;

a second current mirror circuit which is connected to the first current mirror circuit and the VDD terminal; and

a third current mirror circuit which is connected to the second current mirror circuit, the ground terminal, and the negative terminal of the corresponding one of the plurality of secondary batteries.

5. A battery device, comprising:

a plurality of secondary batteries;

a charge/discharge control switch which is provided in a charge/discharge path of the plurality of secondary batteries; and

the battery state monitoring circuit according to claim 1, for monitoring voltages of the plurality of secondary batteries and opening/closing the charge/discharge control switch to control charge/discharge of the plurality of secondary batteries.