MULTIPLE-PHASE FREQUENCY TRANSLATED FILTER

• US 20110300813A1
• Filed: 06/03/2011
• Published: 12/08/2011
• Est. Priority Date: 06/03/2010
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: MIRZAEI, AHMAD, MURPHY, DAVID, DARABI, HOOMAN
• Granted Patent: US 8,483,628 B2
• Time in Patent Office: Days
• US Class Current: 455/78
• CPC Class Codes: H01P 5/10 for coupling balanced lines or devices with unbalanced lines or devices
• CPC Class Codes: H03H 11/1291 Current or voltage controlled filters
• CPC Class Codes: H03H 11/44 Negative impedance converters H03H11/42 takes precedence; used in frequency selective networks H03H11/10
• CPC Class Codes: H03H 19/002 N-path filters
• CPC Class Codes: H03H 19/008 with variable switch closing time
• CPC Class Codes: H03H 2011/0494 Complex filters
• CPC Class Codes: H03H 7/38 Impedance-matching networks
• CPC Class Codes: H03H 7/463 Duplexers
• CPC Class Codes: H04B 1/40 Circuits

Abstract

A frequency translation filter includes a baseband filter circuit, a clock generator, and a switching circuit. The baseband filter circuit is operable to provide a baseband filter response. The clock generator is operable to generate multiple-phase clock signals at a desired frequency. The switching circuit is operable to frequency translate the baseband filter response of the baseband filter circuit to a high frequency filter response in accordance with the multiple-phase clock signals.

Claims

1. A frequency translation filter comprises:

a baseband filter circuit operable to provide a baseband filter response;

a clock generator operable to generate multiple-phase clock signals at a desired frequency; and

a switching circuit operable to frequency translate the baseband filter response of the baseband filter circuit to a high frequency filter response in accordance with the multiple-phase clock signals.

2. The frequency translation filter of claim 1 further comprises:

the baseband filter response including a bandpass filter response at baseband; and

the high frequency filter response including a bandpass filter response at a radio frequency, at an intermediate frequency, or at a frequency of a local oscillation.

3. The frequency translation filter of claim 1, wherein the baseband filter circuit comprises:

a plurality of baseband impedances collectively providing the baseband filter response that has a center frequency substantially at DC.

4. The frequency translation filter of claim 3, wherein a baseband impedance of the plurality of baseband impedances comprises at least one of:

a capacitor;

a switched capacitor filter;

a switched capacitor resistance;

an adjustable capacitor; and

an adjustable resistance.

5. The frequency translation filter of claim 3, wherein the switching circuit comprises:

a plurality of transistors, wherein;

a first transistor of the plurality of transistors couples to a first baseband impedance of the plurality of baseband impedances in accordance with a first clock signal of the multiple-phase clock signals;

a second transistor of the plurality of transistors couples to a second baseband impedance of the plurality of baseband impedances in accordance with a second clock signal of the multiple-phase clock signals;

a third transistor of the plurality of transistors couples to a third baseband impedance of the plurality of baseband impedances in accordance with a third clock signal of the multiple-phase clock signals; and

a fourth transistor of the plurality of transistors couples to a fourth baseband impedance of the plurality of baseband impedances in accordance with a fourth clock signal of the multiple-phase clock signals.

6. The frequency translation filter of claim 1, wherein the baseband filter circuit comprises:

one or more complex baseband impedances collectively providing the baseband filter response that has a center frequency offset from DC.

7. The frequency translation filter of claim 5, wherein a complex baseband impedance of the one or more complex baseband impedances comprises:

an imaginary component that includes a first baseband impedance and a negative gain stage; and

a real component that includes a second baseband impedance and a positive gain stage, wherein the offset from DC is based on a ratio between gain of the positive and negative gain stages and the impedance of the first and second impedances.

8. The frequency translation filter of claim 1, wherein the clock generator comprises:

a ring oscillator that generates a plurality of phased clock signals; and

a plurality of signal conditioning circuits operably coupled to convert the plurality of phased clock signals into the multiple-phase clock signals.

9. A frequency translation bandpass filter comprises:

a plurality of baseband impedances that collectively provide a baseband bandpass filter response;

a clock generator operable to generate multiple-phase clock signals at a desired frequency; and

a plurality of transistors operably coupled to the plurality of baseband impedances in accordance with the multiple-phase clock signals to frequency translate the baseband bandpass filter response to a desired frequency bandpass filter response.

10. The frequency translation bandpass filter of claim 9, wherein a baseband impedance of the plurality of baseband impedances comprises at least one of:

a capacitor;

a switched capacitor filter;

a switched capacitor resistance;

an adjustable capacitor; and

an adjustable resistance, such that the baseband filter response has a center frequency substantially at DC.

11. The frequency translation bandpass filter of claim 9 further comprises:

a first transistor of the plurality of transistors couples to a first baseband impedance of the plurality of baseband impedances in accordance with a first clock signal of the multiple-phase clock signals;

a second transistor of the plurality of transistors couples to a second baseband impedance of the plurality of baseband impedances in accordance with a second clock signal of the multiple-phase clock signals;

a third transistor of the plurality of transistors couples to a third baseband impedance of the plurality of baseband impedances in accordance with a third clock signal of the multiple-phase clock signals; and

a fourth transistor of the plurality of transistors couples to a fourth baseband impedance of the plurality of baseband impedances in accordance with a fourth clock signal of the multiple-phase clock signals to provide at least a portion of a four-phase frequency translated bandpass filter.

12. The frequency translation bandpass filter of claim 9 further comprises:

a first transistor of the plurality of transistors couples to a first baseband impedance of the plurality of baseband impedances in accordance with a first clock signal of the multiple-phase clock signals;

a second transistor of the plurality of transistors couples to a second baseband impedance of the plurality of baseband impedances in accordance with a second clock signal of the multiple-phase clock signals;

a third transistor of the plurality of transistors couples to a third baseband impedance of the plurality of baseband impedances in accordance with a third clock signal of the multiple-phase clock signals;

a fourth transistor of the plurality of transistors couples to the first baseband impedance in accordance with a fourth clock signal of the multiple-phase clock signals;

a fifth transistor of the plurality of transistors couples to the second baseband impedance in accordance with a fifth clock signal of the multiple-phase clock signals; and

a sixth transistor of the plurality of transistors couples to the third baseband impedance in accordance with a sixth clock signal of the multiple-phase clock signals to provide a three-phase frequency translated bandpass filter.

13. The frequency translation bandpass filter of claim 9 further comprises:

a negative gain stage coupled to a first set of the plurality of baseband impedances to produce an imaginary component; and

a positive gain stage coupled to a second set of the plurality of baseband impedances to produce a real component, wherein the imaginary component and the real component provide the baseband filter response that has a center frequency offset from DC and wherein the offset from DC is based on a ratio between gain of the positive and negative gain stages and the impedance of the first and second impedances.

14. The frequency translation bandpass filter of claim 9, wherein the clock generator comprises:

a ring oscillator that generates a plurality of phased clock signals; and

a plurality of signal conditioning circuits operably coupled to convert the plurality of phased clock signals into the multiple-phase clock signals.