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SYSTEMS AND METHODS FOR RELIABLE MULTI-LEVEL CELL FLASH STORAGE

  • US 20110302354A1
  • Filed: 06/02/2010
  • Published: 12/08/2011
  • Est. Priority Date: 06/02/2010
  • Status: Active Grant
First Claim
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1. An electronic device comprising:

  • a processing unit;

    a multi-level cell (MLC) flash memory comprising a plurality of multi-level memory cells comprising a plurality of MLC states, the MLC flash memory comprising a critical portion; and

    a memory controller interfacing the MLC flash with the processing unit, the memory controller responsive to read instructions from the processing unit to read a binary value from an MLC state stored in a given multi-level memory cell in the critical portion.

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