METHOD FOR MANAGING FLASH MEMORIES HAVING MIXED MEMORY TYPES

• US 20110302359A1
• Filed: 02/26/2009
• Published: 12/08/2011
• Est. Priority Date: 02/26/2009
• Status: Active Grant

• Current Assignee: Hyperstone GmbH (Swissbit AG)
• Original Assignee: Hyperstone GmbH (Swissbit AG)
• Inventors: Schmidberger, Franz
• Granted Patent: US 8,706,998 B2
• Time in Patent Office: Days
• US Class Current: 711/103
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/1036 Life time enhancement
• CPC Class Codes: G06F 2212/7208 Multiple device management, e.g. distributing data over multiple flash devices
• CPC Class Codes: G06F 2212/7211 Wear leveling
• CPC Class Codes: G11C 16/349 Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
• CPC Class Codes: G11C 2211/5641 Multilevel memory having cells with different number of storage levels

Abstract

A method manages a flash memory having a plurality of physical blocks. The blocks of the memory are addressed by logic block addresses which are converted into physical block addresses. In each block a deletion counter is run in which the number of deletions of the block is counted, and two regions having different types of flash chips are present. A first region contains single-level flash chips with a large maximum deletion frequency, and a second region contains multi-level flash chips with a lower maximum deletion frequency. When writing to the memory the address conversion of the logic addresses into physical addresses is carried out such that all blocks of the first region are written, when all blocks of the first region have been written and a further writing process is initiated, the block in the first region having the lowest deletion counter is copied into a blank block in the second region.

Claims

1-13. -13. (canceled)

14. A method for managing a flash memory having a plurality of flash chips organized in a plurality of physical blocks that can be deleted separately, the physical blocks having a limited maximum deletion frequency, the physical blocks of the memory being addressed by way of logic block addresses are converted into physical block addresses by way of an address table, wherein in each block a deletion counter is run in which a number of deletions of the block is counted, the flash memory having two regions with different types of the flash chips including a first region containing single-level flash chips having a large maximum deletion frequency, and a second region having multi-level flash chips having a lower maximum deletion frequency than said first region, which method comprises the steps of:

when writing to the flash memory, initially carrying out an address conversion of logic addresses into physical addresses such that all the physical blocks of the first region are written;

when all the blocks of the first region have been written and a further write process is to be carried out, copying the physical block in the first region having a lowest deletion counter into a blank physical block in the second region;

in the address table, switching the physical block addresses assigned to the logic block addresses of these physical blocks; and

deleting the physical block in the first region and the physical block is written with new data.

15. The method according to claim 14, wherein in both the first and second regions deleted buffer blocks are designated, into which further new data is written for the physical blocks that have already been written.

16. The method according to claim 15, which further comprises:

after writing new data of the physical block to a buffer block, assigning the physical address of the physical block to the logic block address in the address table; and

deleting a previous block and its deletion counter is incremented.

17. The method according to claim 14, which further comprises defining a wear-level threshold for each of the first and second regions.

18. The method according to claim 17, wherein for each physical block a wear-level class counter is run, which is incremented when a deletion counter attains a wear-level threshold valid for the physical block, and the deletion counter is set to 0.

19. The method according to claim 17, wherein, during a search for a buffer block, a deleted block with a low value of the wear-level class counter is searched in a same region of the flash memory.

20. The method according to claim 17, wherein for a transition from the first region, in the second region a downward threshold is defined, and for the transition from the second region to the first region an upward threshold is defined.

21. The method according to claim 20, wherein for the first region the downward threshold is determined as a highest current value of the wear-level class counter in the second region, and that for the second region the upward threshold is determined as a lowest current value of the wear-level class counter in the first region.

22. The method according to claim 20, wherein, when the wear-level class counter in the first region is incremented, it is checked whether the wear-level class counter comes below the downward threshold and if this is the case, a buffer block in the second region is used.

23. The method according to claim 20, wherein, when the wear-level class counter in the second region is incremented, it is checked whether the wear-level class counter exceeds the upward threshold and if this is the case, a buffer block in the first region is used.

24. The method according to claim 14, which further comprises when writing the data, forming an error correction word across the data and storing the error correction word in the physical block, and forming a parity word across a content of the physical block and storing the parity word.

25. The method according to claim 24, wherein upon an occurrence of multiple errors while reading from a physical block, a wear-level process is performed immediately for the physical block.

26. The method according to claim 14, wherein for the first and the second regions respectively, a maximum of permitted deletions of the physical blocks is set and, when wear-level class counters are incremented, their current value is compared with set values and, if a maximum of permitted deletions is attained, a warning is issued.