Assigning Priorities to Threads of Execution

• US 20110302588A1
• Filed: 08/16/2011
• Published: 12/08/2011
• Est. Priority Date: 04/25/2007
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Apple Inc.
• Inventors: Cornwell, Michael J., Dudte, Christopher P.
• Granted Patent: US 8,407,705 B2
• Time in Patent Office: Days
• US Class Current: 718/103
• CPC Class Codes: G06F 9/4881 Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues

Abstract

Systems and processes may be implemented to receive threads of execution and assign priorities to the threads of execution. Threads of execution may include nonvolatile memory input/output threads, other input/output threads, and/or other non-input/output threads. A lower priority may be assigned to nonvolatile memory input/output threads than other input/output threads. An algorithm may determine an order of execution of the threads of execution. An order of execution may be at least partially based on assigned priorities.

Claims

1. A method for managing multiple threads of execution comprising:

receiving, from two different types of hardware components in a host device, a first execution thread and a second execution thread;

identifying one or more attributes of the first execution thread and the second execution thread; and

assigning a first priority to the first execution thread and a second priority to the second execution thread based, at least in part, on the identified attributes, wherein priorities assigned to execution threads determine an order of execution.

2. The method of claim 1, further comprising executing the first execution thread and the second execution thread in an order based, at least in part, on the first priority and the second priority.

3. The method of claim 2, wherein the execution order is based, at least in part, on an algorithm, the first priority, and the second priority.

4. The method of claim 3, wherein the first priority and the second priority are assigned based on type of execution thread, and the algorithm is based on a time period in a queue and an assigned priority.

5. The method of claim 1, wherein the first execution thread is received from a NAND driver, the second execution thread is received from a hardware driver different than the NAND driver, and the first priority is lower than the second priority.

6. The method of claim 1, wherein the identified attributes comprise at least one of a type of execution thread, a time in a queue, a frequency of Input/Output (I/O) activity, a number of outstanding I/O operations, a time period since a previous I/O operation, a size of I/O operations, or a time period since a previous user-interface update.

7. The method of claim 1, wherein nonvolatile I/O threads are assigned lower priorities than other types of I/O threads.

8. A computer program product encoded on a non-transitory, tangible storage medium, the product comprising computer readable instructions for causing at least one processor to perform operations comprising:

receiving, from two different types of hardware components in a host device, a first execution thread and a second execution thread;

identifying one or more attributes of the first execution thread and the second execution thread; and

assigning a first priority to the first execution thread and a second priority to the second execution thread based, at least in part, on the identified attributes, wherein priorities assigned to execution threads determine an order of execution.

9. The computer program product of claim 8, the operations further comprising executing the first execution thread and the second execution thread in an order based, at least in part, on the first priority and the second priority.

10. The computer program product of claim 9, wherein the execution order is based, at least in part, on an algorithm, the first priority, and the second priority.

11. The computer program product of claim 10, wherein the first priority and the second priority are assigned based on type of execution thread, and the algorithm is based on a time period in a queue and assigned priorities.

12. The computer program product of claim 8, wherein the first execution thread is received from a NAND driver, the second execution thread is received from a hardware driver different than the NAND driver, and the first priority is lower than the second priority.

13. The computer program product of claim 8, wherein the identified attributes comprise at least one of a type of execution thread, a time in a queue, a frequency of Input/Output (I/O) activity, a number of outstanding I/O operations, a time period since a previous I/O operation, a size of I/O operations, or a time period since a previous user-interface update.

14. The computer program product of claim 8, wherein nonvolatile I/O threads are assigned lower priorities than other types of I/O threads.

15. A system comprising:

a queue operable to store one or more threads of execution including a first execution thread and a second execution thread;

a priority analysis module coupled to the queue, wherein the priority analysis module is operable to;

identify one or more attributes of the first execution thread and the second execution thread; and

assign a first priority to the first execution thread and a second priority to the second execution thread based, at least in part, on the identified attributes, wherein priorities assigned to execution threads determine an order of execution; and

an algorithm operable to determine an order of execution of the threads of execution.

16. The system of claim 15, wherein the algorithm determines the execution order based, at last in part, on the first priority and the second priority.

17. The system of claim 15, wherein the first priority and the second priority are assigned based on type of execution thread, and the algorithm is based on a time period in a queue and assigned priorities.

18. The system of claim 15, wherein the first execution thread is received from a NAND driver, the second execution thread is received from a hardware driver different than the NAND driver, and the first priority is lower than the second priority.

19. The system of claim 15, wherein the identified attributes comprise at least one of a type of execution thread, a time in a queue, a frequency of Input/Output (I/O) activity, a number of outstanding I/O operations, a time period since a previous I/O operation, a size of I/O operations, or a time period since a previous user-interface update.

20. The system of claim 15, wherein the priority analysis module assigns nonvolatile I/O threads lower priorities than other types of I/O threads.