SEMICONDUCTOR DEVICE

• US 20110309355A1
• Filed: 06/10/2011
• Published: 12/22/2011
• Est. Priority Date: 06/18/2010
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: ICHIJO, Mitsuhiro, ENDO, Toshiya, SUZUKI, Kunihiko
• Granted Patent: US 8,552,425 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/441 Deposition of conductive or insulating materials for electrodes
• CPC Class Codes: H01L 21/477 Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering H01L21/38 - H01L21/449 and H01L21/461 - H01L21/475 take precedence
• CPC Class Codes: H01L 29/247 Amorphous materials
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/47 Schottky barrier electrodes H01L29/435 takes precedence
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/495 the conductor material next to the insulator being a simple metal, e.g. W, Mo H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78606 with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device H01L29/78642, H01L29/78645 take precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

An object is to provide a semiconductor device having good electrical characteristics. A gate insulating layer having a hydrogen concentration less than 6×10²⁰ atoms/cm³ and a fluorine concentration greater than or equal to 1×10²⁰ atoms/cm³ is used as a gate insulating layer in contact with an oxide semiconductor layer forming a channel region, so that the amount of hydrogen released from the gate insulating layer can be reduced and diffusion of hydrogen into the oxide semiconductor layer can be prevented. Further, hydrogen present in the oxide semiconductor layer can be eliminated with the use of fluorine; thus, the hydrogen content in the oxide semiconductor layer can be reduced. Consequently, the semiconductor device having good electrical characteristics can be provided.

Claims

1. A semiconductor device comprising:

a gate electrode layer;

an oxide semiconductor layer;

a source electrode layer and a drain electrode layer which are electrically connected to the oxide semiconductor layer; and

a gate insulating layer formed between the gate electrode layer and the oxide semiconductor layer,

wherein a hydrogen concentration in the gate insulating layer is less than 6×

10²⁰ atoms/cm³ and a fluorine concentration in the gate insulating layer is greater than or equal to 1×

10²⁰ atoms/cm³.

2. The semiconductor device according to claim 1, wherein the gate insulating layer is an oxide insulating layer.

3. The semiconductor device according to claim 2, wherein the oxide insulating layer comprises silicon oxide, silicon oxynitride, silicon nitride oxide, hafnium oxide, aluminum oxide, or tantalum oxide.

4. The semiconductor device according to claim 1, wherein the oxide semiconductor layer overlaps the gate electrode layer, and

the gate insulating layer is provided between the oxide semiconductor layer and the gate electrode layer.

5. A semiconductor device comprising:

a gate electrode layer;

an oxide semiconductor layer;

a source electrode layer and a drain electrode layer which are electrically connected to the oxide semiconductor layer;

a gate insulating layer formed between the gate electrode layer and the oxide semiconductor layer; and

an insulating layer overlapping the gate insulating layer, the insulating layer being in contact with the oxide semiconductor layer,

wherein a hydrogen concentration in the gate insulating layer is less than 6×

10²⁰ atoms/cm³ and a fluorine concentration in the gate insulating layer is greater than or equal to 1×

10²⁰ atoms/cm³, and

wherein a hydrogen concentration in the insulating layer is less than 6×

10²⁰ atoms/cm³ and a fluorine concentration in the insulating layer is greater than or equal to 1×

10²⁰ atoms/cm³.

6. The semiconductor device according to claim 5, wherein the gate insulating layer is an oxide insulating layer.

7. The semiconductor device according to claim 6, wherein the oxide insulating layer comprises silicon oxide, silicon oxynitride, silicon nitride oxide, hafnium oxide, aluminum oxide, or tantalum oxide.

8. The semiconductor device according to claim 5, wherein the oxide semiconductor layer overlaps the gate electrode layer with the gate insulating layer between the oxide semiconductor layer and the gate electrode layer.

9. A semiconductor device comprising:

a gate electrode layer;

an oxide semiconductor layer;

a source electrode layer and a drain electrode layer which are electrically connected to the oxide semiconductor layer;

a first gate insulating layer formed covering the gate electrode layer; and

a second gate insulating layer covering the first gate insulating layer and being in contact with the oxide semiconductor layer,

wherein a hydrogen concentration in the second gate insulating layer is less than 6×

10²⁰ atoms/cm³ and a fluorine concentration in the second gate insulating layer is greater than or equal to 1×

10²⁰ atoms/cm³.

10. The semiconductor device according to claim 9, wherein each of the first gate insulating layer and the second gate insulating layer is an oxide insulating layer.

11. The semiconductor device according to claim 10, wherein the oxide insulating layer comprises silicon oxide, silicon oxynitride, silicon nitride oxide, hafnium oxide, aluminum oxide, or tantalum oxide.

12. The semiconductor device according to claim 9, wherein the oxide semiconductor layer overlaps the gate electrode layer with the first gate insulating layer and the second gate insulating layer between the oxide semiconductor layer and the gate electrode layer.

13. The semiconductor device according to claim 9, wherein a fluorine concentration in the first gate insulating layer is less than 1×

10²⁰ atoms/cm³.