Plasma Treatment for Semiconductor Devices
First Claim
1. A semiconductor structure comprising:
- a substrate having a contact pad formed thereon;
a polymer layer over the substrate, the polymer layer having a surface roughness between about 1% and about 8% as measured by Atomic Force Microscopy (AFM) with the index of surface area difference percentage (SADP), the polymer layer having an opening that exposes at least a portion of the contact pad; and
an under bump metallization (UBM) structure extending through the opening and being in electrical contact with the contact pad.
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Accused Products
Abstract
A semiconductor device having a polymer layer and a method of fabricating the same is provided. A two-step plasma treatment for a surface of the polymer layer includes a first plasma process to roughen the surface of the polymer layer and loosen contaminants, and a second plasma process to make the polymer layer smoother or make the polymer layer less rough. An etch process may be used between the first plasma process and the second plasma process to remove the contaminants loosened by the first plasma process. In an embodiment, the polymer layer exhibits a surface roughness between about 1% and about 8% as measured by Atomic Force Microscopy (AFM) with the index of surface area difference percentage (SADP) and/or has surface contaminants of less than about 1% of Ti, less than about 1% of F, less than about 1.5% Sn, and less than about 0.4% of Pb.
64 Citations
20 Claims
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1. A semiconductor structure comprising:
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a substrate having a contact pad formed thereon; a polymer layer over the substrate, the polymer layer having a surface roughness between about 1% and about 8% as measured by Atomic Force Microscopy (AFM) with the index of surface area difference percentage (SADP), the polymer layer having an opening that exposes at least a portion of the contact pad; and an under bump metallization (UBM) structure extending through the opening and being in electrical contact with the contact pad. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A semiconductor structure comprising:
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a substrate having a contact pad formed thereon; and a polymer layer over the substrate, the polymer layer being patterned to expose at least a portion of the contact pad, the polymer layer having surface contaminants of less than about 1% of Ti, less than about 1% of F, less than about 1.5% Sn, and less than about 0.4% of Pb. - View Dependent Claims (8, 9, 10, 11)
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12. A method of forming a device, the method comprising:
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providing a substrate; forming a contact pad on the substrate; forming a protective layer over the contact pad such that at least a portion of the contact pad is exposed; forming an under bump metallization (UBM) structure in electrical contact with the contact pad; forming a conductive bump on the UBM structure; performing a first plasma process on exposed surfaces of the protective layer, the first plasma process roughening a surface of the protective layer; performing one or more process steps after the performing the first plasma process; and performing a second plasma process on exposed surfaces of the protective layer, the second plasma process reducing the roughness of the protective layer. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19, 20)
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Specification