PLANAR CAVITY MEMS AND RELATED STRUCTURES, METHODS OF MANUFACTURE AND DESIGN STRUCTURES

• US 20110314669A1
• Filed: 12/20/2010
• Published: 12/29/2011
• Est. Priority Date: 06/25/2010
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: STAMPER, Anthony K., TWOMBLY, John G.
• Granted Patent: US 8,458,888 B2
• Time in Patent Office: Days
• US Class Current: 29/846
• CPC Class Codes: B81B 2201/014 having a cantilever fixed on one side connected to one or more dimples
• CPC Class Codes: B81B 2203/0118 Cantilevers
• CPC Class Codes: B81B 2203/04 Electrodes
• CPC Class Codes: B81C 1/0015 Cantilevers switches using MEMS H01H1/0036; electrostatic relays using micromechanics H01H59/0009; microelectro-mechanical resonators H03H9/02244
• CPC Class Codes: B81C 1/00365 having low tensile stress between layers
• CPC Class Codes: B81C 1/00476 removing a sacrificial layer B81C1/00912 takes precedence
• CPC Class Codes: B81C 1/00619 Forming high aspect ratio structures having deep steep walls
• CPC Class Codes: B81C 1/00626 Processes for achieving a desired geometry not provided for in groups B81C1/00563 - B81C1/00619
• CPC Class Codes: B81C 1/00666 Treatments for controlling internal stress or strain in MEMS structures
• CPC Class Codes: B81C 2201/0109 Sacrificial layers not provided for in B81C2201/0107 - B81C2201/0108
• CPC Class Codes: B81C 2201/013 Etching
• CPC Class Codes: B81C 2201/0167 by adding further layers of materials having complementary strains, i.e. compressive or tensile strain
• CPC Class Codes: B81C 2201/017 Methods for controlling internal stress of deposited layers not provided for in B81C2201/0164 - B81C2201/0169
• CPC Class Codes: B81C 2203/0136 Growing or depositing of a covering layer
• CPC Class Codes: B81C 2203/0172 Seals
• CPC Class Codes: G06F 2115/04 Micro electro-mechanical systems [MEMS]
• CPC Class Codes: G06F 30/39 Circuit design at the physical level physical level design for reconfigurable circuits G06F30/347
• CPC Class Codes: H01H 1/0036 Switches making use of microelectromechanical systems [MEMS] for electromagnetic relays H01H50/005; for electrostatic relays H01H59/0009
• CPC Class Codes: H01H 2057/006 Micromechanical piezoelectric relay
• CPC Class Codes: H01H 57/00 Electrostrictive relays; Piezoelectric relays
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 : Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H10N 30/306 : Cantilevers
• CPC Class Codes: Y10S 438/937 : Hillock prevention
• CPC Class Codes: Y10T 29/42 : Piezoelectric device making
• CPC Class Codes: Y10T 29/435 : Solid dielectric type
• CPC Class Codes: Y10T 29/49002 : Electrical device making
• CPC Class Codes: Y10T 29/49105 : Switch making
• CPC Class Codes: Y10T 29/49121 : Beam lead frame or beam lead device
• CPC Class Codes: Y10T 29/49126 : Assembling bases
• CPC Class Codes: Y10T 29/4913 : Assembling to base an electrical component, e.g., capacitor, etc.
• CPC Class Codes: Y10T 29/49155 : Manufacturing circuit on or in base
• CPC Class Codes: Y10T 29/5313 : Means to assemble electrical device

Abstract

A method of forming at least one Micro-Electro-Mechanical System (MEMS) includes patterning a wiring layer to form at least one fixed plate and forming a sacrificial material on the wiring layer. The method further includes forming an insulator layer of one or more films over the at least one fixed plate and exposed portions of an underlying substrate to prevent formation of a reaction product between the wiring layer and a sacrificial material. The method further includes forming at least one MEMS beam that is movable over the at least one fixed plate. The method further includes venting or stripping of the sacrificial material to form at least a first cavity.

Claims

1. A method of forming at least one Micro-Electro-Mechanical System (MEMS), comprising:

patterning a wiring layer to form at least one fixed plate;

forming a sacrificial material on the wiring layer;

forming an insulator layer of one or more films over the at least one fixed plate and exposed portions of an underlying substrate to prevent formation of a reaction product between the wiring layer and the sacrificial material;

forming at least one MEMS beam that is movable over the at least one fixed plate; and

venting or stripping of the sacrificial material to form at least a first cavity.

2. The method of claim 1, wherein the reaction product is aluminum silicide.

3. The method of claim 1, wherein the insulator layer over the at least one fixed plate acts to block reaction, alloying, or interdiffusion of material of the at least one fixed plate and the sacrificial material.

4. The method of claim 3, wherein the sacrificial material is silicon, the at least one fixed plate contains aluminum, and the insulator layer provides coverage of the aluminum of the at least one fixed plate.

5. The method of claim 1, wherein the wiring layer is formed with one or more layers such that an undercut is formed with respect to a top most layer of the one or more layers and the insulator layer is formed using conformal deposition processes to provide nearly uniform insulator thickness on a top, side, and bottom surfaces of the wiring layer.

6. The method of claim 5, wherein the one or more layers comprises AlCu under an upper TiN/TiAl₃ layer.

7. The method of claim 1, wherein the insulator layer is formed with a positive tapered profile.

8. The method of claim 7, wherein the insulator layer is formed using a high density plasma chemical vapor deposition (HDPCVD) process.

9. The method of claim 1, wherein the insulator layer of one or more films is formed by a deposition process, etching process and deposition process, with at least one etching process.

10. The method of claim 1, further comprising tapering the insulator layer at corners of the at least one fixed plate to reduce or eliminate the void.

11. The method of claim 1, wherein the insulator layer is conformally deposited over the wiring layer.

12. The method of claim 1, wherein the insulator layer is an oxide deposited by one or more of plasma-enhanced chemical vapor deposition (PECVD), sub-atmospheric CVD (SACVD), atmospheric pressure CVD (APCVD), high density plasma CVD (HDPCVD), physical vapor deposition (PVD), atomic layer deposition (ALD) or low pressure CVD (LPCVD).

13. The method of claim 1, wherein the insulator layer is a conformal barrier comprising Al₂O₃ (alumina), Ta₂O₅ (tantalum pentaoxide), or a combination of both.

14. The method of claim 1, wherein the insulator layer comprises HDPCVD oxide followed ALD alumina.

15. The method of claim 14, wherein the HDPCVD oxide is followed by a PECVD oxide.

16. The method of claim 1, wherein the insulator layer comprises ALD alumina followed by HDPCVD oxide.

17. The method of claim 1, wherein the insulator layer comprises a combination of fast deposition SiO₂ and slow deposition alumina.

18. The method of claim 1, wherein the insulator layer is deposited at temperatures compatible with aluminum wiring.

19. The method of claim 1, wherein the insulator layer forms part or all of a MEMS capacitor dielectric.

20. A method of forming at least one Micro-Electro-Mechanical System (MEMS), comprising:

patterning a wiring layer containing aluminum to form at least one fixed plate on a substrate;

depositing an dielectric layer over the at least one fixed plate on the at least one fixed plate;

depositing a sacrificial silicon layer on top of the dielectric layer, and over the at least one fixed plate, wherein the dielectric layer blocks reaction, alloying, or interdiffusion of the aluminum and the sacrificial silicon layer during the depositing of the sacrificial silicon layer;

forming at least one MEMS beam above the at least one fixed plate; and

venting or stripping of the sacrificial silicon layer to form at least a first cavity.

21. The method of claim 20, wherein the dielectric layer conformally covers the at least one fixed plate

22. The method of claim 20, wherein the dielectric layer provides coverage of aluminum on sidewalls of the at least one fixed plate.

23. The method of claim 22, wherein the dielectric layer comprises tapered edges over the at least one fixed plate.

24. The method of claim 20, wherein the dielectric layer is deposited comprising one or more of plasma-enhanced chemical vapor deposition (PECVD), sub-atmospheric CVD (SACVD), atmospheric pressure CVD (APCVD), high density plasma CVD (HDPCVD), physical vapor deposition (PVD), atomic layer deposition (ALD) or low pressure CVD (LPCVD).

25. The method of claim 20, wherein the dielectric layer is a conformal barrier comprising Al₂O₃ (alumina), Ta₂O₅ (tantalum pentaoxide), or a combination of both.

26. The method of claim 20, wherein the dielectric layer comprises one of:

HDPCVD oxide followed ALD alumina and ALD alumina followed by HDPCVD oxide.

27. The method of claim 26, wherein the HDPCVD oxide is followed by a PECVD oxide.

28. A structure, comprising:

a lower chamber with at least one fixed plate;

an insulator layer covering the at least one fixed plate, the insulator layer structured to prevent formation of aluminum silicide with a sacrificial material deposition; and

at least one upper MEMS beam that is movable over the at least one fixed plate.

29. A method in a computer-aided design system for generating a functional design model of a MEMS, the method comprising:

generating a functional representation of a wiring layer to form at least one fixed plate;

generating a functional representation of an insulator layer over the at least one fixed plate and exposed portions of an underlying substrate to prevent formation of aluminum silicide during a subsequent sacrificial material deposition step;

generating a functional representation of at least one upper MEMS beam over the at least one fixed plate; and

generating a functional representation of venting or stripping of the sacrificial material to form at least a lower cavity,

wherein the generating a functional representation of an insulator layer over the at least one fixed plate comprises a functional representation of a conformal oxidization barrier layer comprising at least one of Al₂O₃ and Ta₂O₅.