SEMICONDUCTOR STRUCTURE AND METHOD OF FABRICATING THE SAME

• US 20120003815A1
• Filed: 07/01/2011
• Published: 01/05/2012
• Est. Priority Date: 07/02/2010
• Status: Abandoned Application

• Current Assignee: BeSang Inc.
• Original Assignee: BeSang Inc.
• Inventors: Lee, Sang-Yun
• Application Number:
  US13/175,293
• Publication Number:
  US 20120003815A1
• Time in Patent Office: Days
• US Class Current: 438/458
• CPC Class Codes: H01L 21/268 using electromagnetic radiation, e.g. laser radiation
• CPC Class Codes: H01L 21/304 Mechanical treatment, e.g. grinding, polishing, cutting H01L21/30625 takes precedence
• CPC Class Codes: H01L 21/76254 with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
• CPC Class Codes: H01L 21/76259 with separation/delamination along a porous layer

Abstract

A method of fabricating a semiconductor substrate includes providing a first semiconductor substrate, which includes a detaching layer spaced from an upper surface of the first semiconductor substrate; forming an ion-implanted layer proximate to an edge of the detaching layer; bonding a second semiconductor substrate to the first semiconductor substrate; forming a crack in the ion-implanted layer in response to applying stress to the ion-implanted layer; and detaching a portion of the first semiconductor substrate in response to cleaving through the crack.

Claims

1. A method for fabricating semiconductor substrate, comprising:

providing a first semiconductor substrate, which includes a detaching layer spaced from an upper surface of the first semiconductor substrate;

forming an ion-implanted layer proximate to an edge of the detaching layer;

bonding a second semiconductor substrate to the first semiconductor substrate;

forming a crack in the ion-implanted layer in response to applying stress to the ion-implanted layer; and

detaching a portion of the first semiconductor substrate in response to cleaving through the crack.

2. The method of claim 1, wherein the detaching layer is a porous layer.

3. The method of claim 1, wherein providing the first semiconductor substrate comprises:

providing a single crystalline semiconductor substrate;

forming a detaching layer on the surface of the single crystalline semiconductor substrate; and

forming a single crystalline epitaxial layer on the detaching layer.

4. The method of claim 3, wherein the second semiconductor substrate is bonded to surface of the single crystalline epitaxial layer.

5. The method of claim 1, wherein the ion-implanted layer is formed in ring shaped along to the edge boundary of the first semiconductor substrate.

6. The method of claim 1, wherein forming the ion-implanted layer comprises, forming a mask pattern on the first semiconductor substrate which exposes edge boundary of the first semiconductor substrate;

and forming the ion-implanted layer by ion-implanting hydrogen ions into the edge boundary of the detaching layer using the mask pattern.

7. The method of claim 6, wherein forming the mask pattern is positioning a mechanical device which exposes the edge boundary of the first semiconductor substrate.

8. The method of claim 1, wherein forming the detaching layer on the first semiconductor substrate is further included before bonding to the second semiconductor substrate.

9. The method of claim 1, wherein adding stress to the ion-implanted layer includes heating sidewall of the ion-implanted layer or adding physical shock to the sidewall of the ion-implanted layer.

10. The method of claim 1, wherein adding stress to the ion-implanted layer includes uniformly irradiating laser around sidewall of the ion-implanted layer or uniformly injecting waterjet around sidewall of the ion-implanted layer.

11. The method of claim 9, wherein heating sidewall of the ion-implanted layer includes heating sidewall of the ion-implanted layer at the temperature of 350 to 600 degree Celsius.

12. The method of claim 1, wherein the method further includes treating remnant of the first semiconductor substrate on the second semiconductor substrate, which is remained after detaching a portion of the first semiconductor.

13. The method of claim 12, wherein the treating remnant of the first semiconductor substrate includes polishing or etching surface of the first semiconductor substrate remaining on the second semiconductor substrate.

14. A method for fabricating semiconductor device, comprising:

providing a first semiconductor substrate, which includes a detaching layer proximate to a pre-defined depth from a surface of the first semiconductor substrate;

forming an ion-implanted layer proximate to the edge of the detaching layer;

bonding a second semiconductor substrate to the surface of the first semiconductor substrate, wherein the second semiconductor substrate includes a semiconductor device and an isolation layer which covers the semiconductor device;

applying stress to the ion-implanted layer;

cleaving through the ion-implanted layer to remove a portion of the first semiconductor substrate; and

forming a second semiconductor device on the portion of the first semiconductor substrate.

15. The method of claim 14, wherein the detaching layer includes porous silicon.

16. The method of claim 14, wherein providing the first semiconductor substrate includes, providing a single crystalline semiconductor substrate;

forming a detaching layer on the surface of the single crystalline semiconductor substrate; and

forming single crystalline epitaxial layer on the detaching layer.

17. The method of claim 14, wherein the ion-impanted layer is formed in ring shaped along to the edge boundary of the first semiconductor substrate.

18. The method of claim 14, wherein forming the ion-implanted layer includes, forming a mask pattern which exposes edge boundary of the first semiconductor substrate on the first semiconductor substrate;

and forming the ion-implanted layer by ion-implanting hydrogen ions into the edge boundary of the detaching layer using the mask pattern.

19. The method of claim 18, wherein forming the mask pattern is positioning a mechanical device which exposes the edge boundary of the first semiconductor substrate.

20. The method of claim 14, wherein bonding the second semiconductor substrate to the surface of the first semiconductor substrate is bonding the isolation layer on the second semiconductor substrate and surface of the first semiconductor substrate.