SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND IC CARD MOUNTING SAME
First Claim
1. A semiconductor integrated circuit device comprising:
- an antenna terminal coupled to an antenna;
a power supply circuit that generates power supply voltage from an alternating-current (AC) signal supplied from the antenna to the antenna terminal; and
a receiver circuit that demodulates an information signal which is superimposed on the AC signal,wherein the receiver circuit comprises a rectifier circuit, a filter circuit, a capacitor, an amplifier, a feedback path, a switch circuit, a binarizing circuit, and a control circuit,wherein the rectifier circuit rectifies the AC signal supplied to the antenna terminal to smooth the AC signal,wherein the filter circuit is configured for an output signal of the rectifier circuit to be supplied to an input terminal of the filter circuit which reduces a high frequency component,wherein the amplifier is configured for an output signal of the filter circuit to be supplied to an inverting input terminal of the amplifier via the capacitor,wherein the amplifier has a function of inverting and amplifying an input signal supplied to the inverting input terminal with respect to a first reference voltage,wherein the inverting input terminal is configured for an output signal of the amplifier to be transmitted to the inverting input terminal via the feedback path and the switch circuit,wherein the switch circuit is configured to be controlled by an output signal of the control circuit,wherein the binarizing circuit binarizes the output signal of the amplifier, andwherein, in a lapse period of predetermined time since a level change in an output signal of the binarizing circuit, the switch circuit is controlled to an off state by the output signal of the control circuit.
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Accused Products
Abstract
In an IC card, even in the case where an undershoot or an overshoot which occurs at the time of an amplitude change by communication data is large, the amplitude change is accurately detected.
A semiconductor integrated circuit device B2 has antenna terminals LA and LB, a power supply circuit B3 for generating power supply voltage from an alternating-current (AC) signal supplied to the antenna terminals, and a receiver circuit B5 for demodulating an information signal which is superimposed on the AC signal. The receiver circuit B5 includes a rectifier circuit B9, a filter circuit B10, a capacitor C1, an amplifier A1, a feedback path B11, a switch circuit SW1, a binarizing circuit B12, and a control circuit B13. An output signal S3 of the amplifier A1 is transmitted to an inverting input terminal—of A1 via B11 and SW1, and the switch circuit SW1 is controlled by an output signal SC1 of the control circuit B13. In a lapse period of predetermined time T1 since level changes X and Y of an output signal SR of the binarizing circuit B12, the switch circuit SW1 is controlled to an off state by the output signal SC1 of the control circuit B13.
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Citations
20 Claims
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1. A semiconductor integrated circuit device comprising:
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an antenna terminal coupled to an antenna; a power supply circuit that generates power supply voltage from an alternating-current (AC) signal supplied from the antenna to the antenna terminal; and a receiver circuit that demodulates an information signal which is superimposed on the AC signal, wherein the receiver circuit comprises a rectifier circuit, a filter circuit, a capacitor, an amplifier, a feedback path, a switch circuit, a binarizing circuit, and a control circuit, wherein the rectifier circuit rectifies the AC signal supplied to the antenna terminal to smooth the AC signal, wherein the filter circuit is configured for an output signal of the rectifier circuit to be supplied to an input terminal of the filter circuit which reduces a high frequency component, wherein the amplifier is configured for an output signal of the filter circuit to be supplied to an inverting input terminal of the amplifier via the capacitor, wherein the amplifier has a function of inverting and amplifying an input signal supplied to the inverting input terminal with respect to a first reference voltage, wherein the inverting input terminal is configured for an output signal of the amplifier to be transmitted to the inverting input terminal via the feedback path and the switch circuit, wherein the switch circuit is configured to be controlled by an output signal of the control circuit, wherein the binarizing circuit binarizes the output signal of the amplifier, and wherein, in a lapse period of predetermined time since a level change in an output signal of the binarizing circuit, the switch circuit is controlled to an off state by the output signal of the control circuit. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. An IC card mounted with a semiconductor integrated circuit device and an antenna over a main surface of a substrate, the antenna being formed by a wire,
wherein the semiconductor integrated circuit device comprises: -
an antenna terminal coupled to an antenna; a power supply circuit that generates power supply voltage from an alternating-current (AC) signal supplied from the antenna to the antenna terminal; and a receiver circuit that demodulates an information signal which is superimposed on the AC signal, wherein the receiver circuit comprises a rectifier circuit, a filter circuit, a capacitor, an amplifier, a feedback path, a switch circuit, a binarizing circuit, and a control circuit, wherein the rectifier circuit rectifies the AC signal supplied to the antenna terminal to smooth the AC signal, wherein the filter circuit is configured for an output signal of the rectifier circuit to be supplied to an input terminal of the filter circuit which reduces a high frequency component, wherein the amplifier is configured for an output signal of the filter circuit to be supplied to an inverting input terminal of the amplifier via the capacitor, wherein the amplifier has a function of inverting and amplifying an input signal supplied to the inverting input terminal with respect to a first reference voltage, wherein the inverting input terminal is configured for an output signal of the amplifier to be transmitted to the inverting input terminal via the feedback path and the switch circuit, wherein the switch circuit is configured to be controlled by an output signal of the control circuit, wherein the binarizing circuit binarizes the output signal of the amplifier, and wherein in a lapse period of predetermined time since a change in level of an output signal of the binarizing circuit, the switch circuit is controlled to an off state by the output signal of the control circuit. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20)
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Specification