ORGANIC LIGHT-EMITTING DISPLAY DEVICE AND MANUFACTURING METHOD OF THE SAME

• US 20120007083A1
• Filed: 04/05/2011
• Published: 01/12/2012
• Est. Priority Date: 07/07/2010
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Mobile Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: YOU, Chun-Gi, Choi, Joon-Hoo
• Granted Patent: US 9,012,890 B2
• Time in Patent Office: Days
• US Class Current: 257/59
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 29/41733 for thin film transistors with insulated gate
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/66757 Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
• CPC Class Codes: H10K 50/30 Organic light-emitting transistors
• CPC Class Codes: H10K 50/852 comprising a resonant cavity structure, e.g. Bragg reflector pair
• CPC Class Codes: H10K 50/856 comprising reflective means
• CPC Class Codes: H10K 59/1201 Manufacture or treatment
• CPC Class Codes: H10K 59/121 characterised by the geometry or disposition of pixel elements
• CPC Class Codes: H10K 59/122 Pixel-defining structures or layers, e.g. banks
• CPC Class Codes: H10K 59/123 Connection of the pixel electrodes to the thin film transistors [TFT]

Abstract

An organic light-emitting display device and a method of manufacturing the organic light-emitting display device. A metal layer separated from a pixel electrode is formed without increasing the number of masks, thereby simplifying the pixel electrode and obtaining etching characteristics of a gate electrode.

Claims

1. An organic light-emitting display device comprising:

a thin-film transistor (TFT) comprising a gate electrode, a source electrode, and a drain electrode;

an organic light-emitting device electrically connected to the TFT, in which a pixel electrode formed on the same layer as the gate electrode, an intermediate layer including an emissive layer, and an opposite electrode are sequentially stacked in the order stated;

a storage capacitor comprising a bottom electrode and a top electrode formed on the same layer as the gate electrode; and

a metal layer separated from the pixel electrode by an insulation layer formed below the pixel electrode, and formed on the entire surface of the substrate.

2. The organic light-emitting display device of claim 1, wherein the gate electrode comprises a first electrode comprising the same material as the pixel electrode and a second electrode formed on the first electrode.

3. The organic light-emitting display device of claim 1, wherein the top electrode comprises the same material as the pixel electrode.

4. The organic light-emitting display device of claim 1, wherein the pixel electrode is electrically connected to one of the source and drain electrodes.

5. The organic light-emitting display device of claim 1, wherein the metal layer comprises a single layer.

6. The organic light-emitting display device of claim 1, wherein the metal layer comprises multiple layers.

7. The organic light-emitting display device of claim 1, wherein the metal layer comprises at least one selected from the group consisting of Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, Ca, Mo, Ti, W, MoW, LiF/Ca, LiF/Al, Al/Cu, Al/Nd, AlLiNa, ITO/Ag/ITO, ITO/Ag/IZO, ATD, and ITO/APC/ITO.

8. The organic light-emitting display device of claim 1, wherein the bottom electrode is formed on the same layer and comprises the same material as the active layer of the TFT.

9. A method of manufacturing an organic light-emitting display device, the method comprising:

sequentially depositing a metal layer and a first insulation layer on a substrate in the order stated;

using a first mask to form an active layer of a TFT and a capacitor bottom electrode on the first insulation layer;

using a second mask to form electrode patterns for forming a capacitor gate electrode, a pixel electrode, and a capacitor top electrode on the active layer and the capacitor bottom electrode;

using a third mask to form an interlayer insulation layer having an opening that exposes two sides of the active layer and a portion of each of the electrode patterns;

using a fourth mask to form source and drain electrodes contacting the exposed two sides of the active layer, the pixel electrode, and the capacitor top electrode; and

using a fifth mask to form a pixel define layer exposing the pixel electrode.

10. The method of claim 9, wherein using the second mask comprises:

sequentially depositing a second insulation layer, a first conductive layer, and a second conductive layer in the order stated on the active layer and the capacitor bottom electrode; and

patterning the first conductive layer and the second conductive layer to form the gate electrode that comprises the first conductive layer as a first electrode and the second conductive electrode as a second electrode.

11. The method of claim 10, further comprising forming a source region, a drain region, and a channel region between the source and drain regions by doping the active layer.

12. The method of claim 9, wherein using the third mask comprises:

depositing a third insulation layer on the gate electrode and the electrode patterns; and

patterning the third insulation layer to form an opening that exposes a portion of the source and drain regions of the active layer and a portion of each of the electrode patterns.

13. The method of claim 9, wherein using the fourth mask comprises:

depositing a third conductive layer on the interlayer insulation layer; and

patterning the third insulation layer to form the source and drain electrodes.

14. The method of claim 10, wherein using the fourth mask comprises:

forming the source and drain electrodes; and

removing the second conductive layer constituting the electrode patterns to form the pixel electrode and the capacitor top electrode that respectively use the first conductive layer as an electrode.

15. The method of claim 9, wherein using the fifth mask comprises:

depositing a fourth insulation layer on the entire surface of the substrate; and

patterning the fourth insulation layer to form the pixel define layer.

16. The method of claim 9, wherein the metal layer comprises a single layer.

17. The method of claim 9, wherein the metal layer comprises a plurality of layers.

18. The method of claim 9, wherein the metal layer comprises at least one selected from the group consisting of Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, Ca, Mo, Ti, W, MoW, LiF/Ca, LiF/Al, Al/Cu, Al/Nd, AlLiNa, ITO/Ag/ITO, ITO/Ag/IZO, ATD, and ITO/APC/ITO.

19. The method of claim 9, wherein the first insulation layer comprises at least one organic insulation material selected from the group consisting of polyimide, polyamide, an acrylic resin, benzocyclobutene, and a phenolic resin