BACKSIDE ILLUMINATED IMAGE SENSOR AND METHOD OF MANUFACTURING THE SAME

• US 20120009720A1
• Filed: 07/06/2011
• Published: 01/12/2012
• Est. Priority Date: 07/07/2010
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Ahn, Jung-Chak, Kim, Bum-Suk, SHIM, Eun-Sub, Lee, Kyung-Ho
• Granted Patent: US 9,034,682 B2
• Time in Patent Office: Days
• US Class Current: 438/70
• CPC Class Codes: H01L 27/14625 Optical elements or arrangements associated with the device
• CPC Class Codes: H01L 27/1464 Back illuminated imager structures
• CPC Class Codes: H01L 27/14685 Process for coatings or optical elements
• CPC Class Codes: H01L 27/14687 Wafer level processing

Abstract

A method of manufacturing a backside illuminated image sensor, including forming a first isolation layer in a first semiconductor layer, such that the first isolation layer defines pixels of a pixel array in the first semiconductor layer, forming a second semiconductor layer on a first surface of the first semiconductor layer, forming a second isolation layer in the second semiconductor layer, such that the second isolation layer defines active device regions in the second semiconductor layer, forming photo detectors and circuit devices by implanting impurities into a first surface of the second semiconductor layer, the first surface of the second semiconductor layer facing away from the first semiconductor layer, forming a wiring layer on the first surface of the second semiconductor layer, and forming a light filter layer on a second surface of the first semiconductor layer.

Claims

1. A method of manufacturing a backside illuminated image sensor having a pixel array, the method comprising:

forming a first isolation layer in a first semiconductor layer, such that the first isolation layer defines pixels of the pixel array in the first semiconductor layer;

forming a second semiconductor layer on a first surface of the first semiconductor layer;

forming a second isolation layer in the second semiconductor layer, such that the second isolation layer defines active device regions in the second semiconductor layer;

forming photo detectors and circuit devices by implanting impurities into a first surface of the second semiconductor layer, the first surface of the second semiconductor layer facing away from the first semiconductor layer;

forming a wiring layer on the first surface of the second semiconductor layer; and

forming a light filter layer on a second surface of the first semiconductor layer, the second surface of the first semiconductor layer being opposite the first surface of the first semiconductor layer.

2. The method as claimed in claim 1, wherein forming the second semiconductor layer includes using an epitaxial method.

3. The method as claimed in claim 2, wherein the first semiconductor layer is formed by using an epitaxial method.

4. The method as claimed in claim 3, wherein forming the light filter layer includes:

forming the first semiconductor layer on a first supporting substrate;

forming a second supporting substrate on a surface of the wiring layer facing away from the second semiconductor layer;

removing the first supporting substrate from the first semiconductor layer;

forming a color filter layer on the second surface of the first semiconductor layer; and

forming a lens layer on the color filter layer.

5. The method as claimed in claim 4, wherein forming the first isolation layer includes forming a trench-type insulation layer.

6. The method as claimed in claim 5, wherein forming the first isolation layer includes using a material having a refraction index lower than that of a material of the first semiconductor layer.

7. The method as claimed in claim 6, wherein the first isolation layer is formed to extend from the first surface of the first semiconductor layer toward the second surface of the first semiconductor layer, a length of the first isolation layer being substantially equal a thickness of the first semiconductor layer.

8. The method as claimed in claim 6, wherein the first isolation layer is formed to extend from the first surface of the first semiconductor layer toward the second surface of the first semiconductor layer, a length of the first isolation layer being shorter than a thickness of the first semiconductor layer.

9. The method as claimed in claim 6, wherein the first isolation layer is formed to have a lattice structure surrounding each of the pixels of the pixel array.

10. The method as claimed in claim 4, wherein the photo detectors are formed to be aligned with corresponding micro-lenses of the lens layer.

11. The method as claimed in claim 10, wherein a center of each of the photo detectors is aligned with a center of each corresponding pixel of the pixel array.

12. The method as claimed in claim 11, wherein each photo detector is a photo diode, a photo transistor, a photo gate, or a pinned photo diode (PPD).

13. The method as claimed in claim 11, wherein active regions of the circuit devices are formed to be symmetric around an imaginary line extending from the first isolation layer.

14. The method as claimed in claim 13, wherein a first part of the photo detector is formed in the first semiconductor layer and a second part of the photo detector is formed in the second semiconductor layer.

15. The method as claimed in claim 14, wherein at least two of the pixels share a floating diffusion (FD) region.

16. The method as claimed in claim 15, wherein the circuit devices include:

transmitting transistors for transmitting charges accumulated in the corresponding photo detectors to the corresponding FD regions;

resetting transistors for initializing potentials of the corresponding FD regions;

driving transistors for amplifying changes of potentials of the corresponding FD regions; and

selecting transistors for outputting output signals of the corresponding driving transistors in response to corresponding row selecting signals.

17. A method of manufacturing a backside illuminated image sensor having a pixel array, the method comprising:

forming an isolation layer in a semiconductor substrate, such that the isolation layer defines pixels of the pixel array in the semiconductor substrate;

forming a photo detector in each pixel, such that the isolation layer separates adjacent photo detectors;

forming a wiring layer on the semiconductor substrate; and

forming a light filter layer on the semiconductor substrate, such that the semiconductor substrate with the photo detectors is between the wiring layer and the light filter layer.

18. The method as claimed in claim 17, wherein the light filter layer is formed directly on the semiconductor substrate.

19. The method as claimed in claim 17, wherein forming the isolation layer in the semiconductor substrate includes:

forming a first isolation layer in a first semiconductor layer of the semiconductor substrate to define the pixels;

forming a second isolation layer in a second semiconductor layer of the semiconductor substrate, such that the second semiconductor layer is on the first semiconductor layer, and such that the second isolation layer has a different pattern than the first isolation layer; and

forming the photo detectors by implanting impurities into a first surface of the second semiconductor layer, the first surface of the second semiconductor layer facing away from the first semiconductor layer.

20. The method as claimed in claim 19, wherein:

forming the first isolation layer includes forming first trenches with an insulation material between adjacent pixels, such that the first trenches extend over at least a majority of a thickness of the first semiconductor layer to completely overlap the photo detectors in the pixels; and

forming the second isolation layer includes forming second trenches with an insulation material, such that the second trenches define regions for active devices, and such that the regions for active devices do not overlap the photo detectors.