METHOD AND APPARATUS FOR COMPLEX TIME MEASUREMENTS

• US 20120010857A1
• Filed: 01/25/2011
• Published: 01/12/2012
• Est. Priority Date: 07/12/2010
• Status: Active Grant

• Current Assignee: Advantest Corporation
• Original Assignee: Advantest Corporation
• Inventors: RICHTER, Klaus, KOEHLDORFNER, Alois, HEIBLER, Bernhard
• Granted Patent: US 8,938,370 B2
• Time in Patent Office: Days
• US Class Current: 702/187
• CPC Class Codes: G01R 31/31907 Modular tester, e.g. controlling and coordinating instruments in a bus based architecture

Abstract

Apparatus used in an automatic test equipment, comprising a plurality of system modules. Each system module comprises a Time Measurement Unit. The Time Measurement Unit comprises a Global Time Stamping Module. The Global Time Stamping Module comprises a plurality of Global Time Stamping Cores that comprising: an information receiving section for receiving at least two information, an event receiving section for receiving at a Core Input events, an event determining section for determining events of interest from said received events appearing on said Core Input, and an instructing section for instructing a Time Stamp Memory to record a current status of a Time Stamp Counter corresponding to the Clock Information, if an event of interest is determined. The Global Time Stamping Module further comprises a supplying section for supplying said plurality of Global Time Stamping Cores with a common time base.

Claims

1. Apparatus for use in an automatic test equipment, comprising a plurality of system modules (SYSMOD), whereby

a system module (SYSMOD) comprises a Time Measurement Unit (TMU), whereby

said Time Measurement Unit (TMU) comprises a Global Time Stamping Module (GTSM),

said Global Time Stamping Module (GTSM) comprises a plurality of Global Time Stamping Cores (GTSC),

said Global Time Stamping Core (GTSC) comprises:

an information receiving section for receiving at least two information, whereby a first information of said received two information is containing a Clock Information (CL_INF) and a second information of said received two information is containing a Synchronization Information (SYNC_INF),

an event receiving section for receiving at a Core Input (IN) events (EV), allowing for a synchronized data acquisition of a plurality of Global Time Stamping Cores (GTSC),

an event determining section for determining events of interest (EV_INT) from said received events (EV) appearing on said Core Input (IN), and

an instructing section for instructing a Time Stamp Memory (TSM) to record a current status (TS) of a Time Stamp Counter (TSC) corresponding to the Clock Information (CL_INF), if an event of interest (EV_INT) is determined, and

the Global Time Stamping Module (GTSM) further comprising

a supplying section for supplying said plurality of Global Time Stamping Cores (GTSC) with a common time base, thereby provoking a synchronized data acquisition of the plurality of Global Time Stamping Cores (GTSM).

2. Apparatus according to claim 1, whereby the number of inputs of the Time Measurement Unit (TMU) is at least as high as the number of I/O-ports of the system module (SYSMOD) towards the Device Under Test.

3. Apparatus according to any of claim 1, comprising a scaling section for scaling different resolutions of different Time Measurement Units (TMU) providing a unified resolution.

4. Apparatus according to any of claim 1, comprising an interpolating section for interpolating an event time between two values of a Time Stamp Counter (TSC).

5. Apparatus according to claim 1, comprising an emulating section for emulating analog comparators for comparing digitized values of an analog signal, whereby a time stamp TS is generated by a digital comparator comparing digital values of an analog signal.

6. Apparatus according to claim 1, wherein the apparatus further comprises a collecting section for collecting the recorded Time Stamp Values (TS) of said plurality of Time Measurement Units (TMU).

7. Apparatus according to claim 6, comprising a calculating section for calculating time differences based on said collected Time Stamp Values (TS).

8. A Global Time Stamping Module method (GTSM) for use in automatic test equipments, comprising

a plurality of Global Time Stamping Cores (GTSC),

a Global Time Stamping Core (GTSC) comprising the steps of

receiving at least two information, whereby a first information of said received two information is containing a Clock Information (CL_INF) and a second information of said received two information is containing a Synchronization Information (SYNC_INF),

receiving at a Core Input (CI) events (EV), allowing for a synchronized data acquisition of a plurality of Global Time Stamping Cores (GTSC),

determining events of interest (EV_INT) from said received events (EV) appearing on said Core Input (CI),

and if an event of interest (EV_INT) is determined, instructing a Time Stamp Memory (TSM) to record a current status (TS) of a Time Stamp Counter (TSC), corresponding to the Clock Information (CL_INF), and

the Global Time Stamping Module method (GTSM) further comprises

supplying said plurality of Global Time Stamping Cores (GTSC) with a common time base, thereby provoking a synchronized data acquisition of the plurality of Global Time Stamping Cores (GTSC).

9. A Global Time Stamping Core method (GTSC) for use in automatic test equipments, comprising the steps of

receiving at least two information, whereby a first information of said received two information is containing a Clock Information (CL_INF) and a second information of said received two information is containing a Synchronization Information (SYNC_INF),

receiving at a Core Input (CI) events (EV), allowing for a synchronized data acquisition of a plurality of Global Time Stamping Cores (GTSC),

determining events of interest (EV_INT) from said received events (EV) appearing on said Core Input (CI),

and if an event of interest (EV_INT) is determined, instructing a Time Stamp Memory (TSM) to record a current status (TS) of a Time Stamp Counter (TSC), corresponding to the Clock Information (CL_INF).

10. The method according to claim 9, wherein the Time Stamp Counter (TSC) may be reset in response to a reset information of the Synchronization Information (SYNC_INF).