SWITCHED CAPACITOR TYPE D/A CONVERTER

• US 20120013496A1
• Filed: 07/11/2011
• Published: 01/19/2012
• Est. Priority Date: 07/15/2010
• Status: Active Grant

• Current Assignee: ROHM Co., Ltd.
• Original Assignee: ROHM Co., Ltd.
• Inventors: Nakamura, Kei
• Granted Patent: US 8,456,343 B2
• Time in Patent Office: Days
• US Class Current: 341/150
• CPC Class Codes: H03M 1/0682 using a differential network structure, i.e. symmetrical with respect to ground
• CPC Class Codes: H03M 1/0845 of power supply variations, e.g. ripple
• CPC Class Codes: H03M 1/804 with charge redistribution

Abstract

A switched capacitor type D/A converter receives m-bit (m represents an integer) input data, and outputs an analog signal that corresponds to the input data value. Switch circuits are provided to respective bits of the input data, and are classified into two groups: a first group configured to turn on when the corresponding input data bit is 1, and to turn off when the corresponding input data bit is 0; and a second group configured to turn on when the corresponding input data bit is 0, and to turn off when the corresponding input data bit is 1. Each switch of the first and second switch groups is configured as a P-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor). The ground voltage 0 V is applied to the lower power supply terminal of each of the first and second inverters configured to supply a gate signal to each switch.

Claims

1. A switched capacitor type D/A converter configured to receive m-bit (m represents an integer) input data, and to output an analog signal that corresponds to the value of the input data, the switched capacitor type D/A converter comprising:

m switch circuits provided to respective bits of the input data, each switch circuit comprising a first switch group and a second switch group, each switch in the first switch group being on state when the corresponding bit of the input data is 1 and being off state when the corresponding bit of the input data is 0, each switch in the second switch group being on state when the corresponding bit of the input data is 0 and being off state when the corresponding bit of the input data is 1;

a first inverter configured to output a gate signal to each switch in the first switch group; and

a second inverter configured to output a gate signal to each switch in the second switch group,

wherein each switch in the first switch group and the second switch group is configured as a P-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor),

and wherein a ground voltage is applied to a lower power supply terminal of each of the first inverter and the second inverter.

2. A switched capacitor type D/A converter according to claim 1, wherein the back gate of the P-channel MOSFET is fixed at an electric potential that is lower than the voltage to be input to an upper power supply terminal of each of the first inverter and the second inverter.

3. A switched capacitor type D/A converter according to claim 1, wherein an output voltage of a DC/DC converter is supplied to an upper power supply terminal of each of the first inverter and the second inverter.

6. A switched capacitor type D/A converter according to claim 1, wherein the input data is in the form of a digital audio signal.

4. A switched capacitor type D/A converter configured to receive m-bit (m represents an integer) input data, and to output an analog signal that corresponds to the value of the input data, the switched capacitor type D/A converter comprising:

m switch circuits provided to respective bits of the input data, each switch circuit comprising a first switch group and a second switch group, each switch in the first switch group being on state when the corresponding bit of the input data is 1 and being off state when the corresponding bit of the input data is 0, each switch in the second switch group being on state when the corresponding bit of the input data is 0 and being off state when the corresponding bit of the input data is 1;

a first inverter configured to output a gate signal to each switch in the first switch group;

a second inverter configured to output a gate signal to each switch in the second switch group;

a band gap reference circuit configured to generate a reference voltage; and

a linear regulator configured to output a voltage that corresponds to the reference voltage,

wherein each switch in the first switch group and the second switch group is configured as an N-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor),

and wherein an output voltage of the linear regulator is supplied to an upper power supply terminal of each of the first inverter and the second inverter.

7. A switched capacitor type D/A converter according to claim 4, wherein the input data is in the form of a digital audio signal.

5. A switched capacitor type D/A converter configured to receive m-bit (m represents an integer) input data, and to output an analog signal that corresponds to the value of the input data, the switched capacitor type D/A converter comprising:

m switch circuits provided to respective bits of the input data, each switch circuit comprising a first transfer gate group and a second transfer gate group, each transfer gate in the first transfer gate group being on state when the corresponding bit of the input data is 1 and being off state when the corresponding bit of the input data is 0, each transfer gate in the second transfer gate group being on state when the corresponding bit of the input data is 0 and being off state when the corresponding bit of the input data is 1;

a first inverter configured to output a gate signal to each N-channel MOSFET in the first transfer gate group and each P-channel MOSFET in the second transfer gate group;

a second inverter configured to output a gate signal to each P-channel MOSFET in the first transfer gate group and each N-channel MOSFET in the second transfer gate group;

a band gap reference circuit configured to generate a reference voltage; and

a linear regulator configured to receive the reference voltage,

wherein a ground voltage is applied to a lower power supply terminal of each of the first inverter and the second inverter,

and wherein an output voltage of the linear regulator is applied to an upper power supply terminal of each of the first inverter and the second inverter.

8. A switched capacitor type D/A converter according to claim 5, wherein the input data is in the form of a digital audio signal.