SYSTEM FOR TREE SEQUENCE TESTING OF A DEVICE AND METHOD FOR TREE SEQUENCE TESTING OF A DEVICE IN A TEST FRAMEWORK ARCHITECTURE

• US 20120017128A1
• Filed: 03/31/2009
• Published: 01/19/2012
• Est. Priority Date: 03/31/2009
• Status: Active Grant

• Current Assignee: NXP USA, Inc. (NXP Semiconductors NV)
• Original Assignee: Freescale Semiconductor (NXP Semiconductors NV)
• Inventors: Tepus, Cristian
• Granted Patent: US 8,533,544 B2
• Time in Patent Office: Days
• US Class Current: 714/724
• CPC Class Codes: G06F 11/3688 for test execution, e.g. scheduling of test suites

Abstract

A system comprises a test framework architecture for tree sequence testing of a device, comprising a plurality of hierarchical layers at least comprising an upmost layer and a lowest layer, each layer of the plurality of hierarchical layers comprising at least one of a plurality of test sequences, each test sequence comprising a plurality of test steps, each test step comprising a current layer information; a test action information for carrying out a test action on the device; and a recovery information for carrying out a recovery action on reception of a recovery call from a next lower layer.

Claims

1. A system for tree sequence testing of a device, comprising:

a current layer memory unit storing current layer information describing a current layer;

a test action memory unit storing test action instructions executable by a test module for a test action to be carried out on said device; and

a recovery memory unit storing recovery instructions executable by said test module, for a recovery action to be carried out on reception of a recovery call from a next lower layer with respect to the current layer, wherein

said system is arranged to execute a multiple of test sequences in a hierarchical order defined by a test framework architecture,

the test framework architecture comprises a plurality of hierarchical layers at least comprising an upmost layer and a lowest layer,

each layer of said plurality of hierarchical layers comprises at least one test sequence, and each test sequence comprising a plurality of test steps comprising;

executing on said device, in accordance with said test action instructions, said test action associated with said current layer,

executing a recovery action in accordance with said recovery instructions on reception of a recovery call from a next lower layer with respect to the current layer, and

transmitting a recovery call to a next upper layer with respect to the current layer when said test action fails.

2. The system as claimed in claim 1, wherein said recovery call from said next lower layer is generated when a test action of a test step of a test sequence of said next lower layer fails.

3. The system as claimed in claim 1, wherein recovery calls are recursively generated from each next lower level until a recovery action of a test step of a test sequence of a current layer succeeds.

4. The system as claimed in claim 1, wherein said recovery call is passed on to a next upper layer, when a test action failure classification indicates that a recovery action will not be successful for a current layer.

5. The system as claimed in claim 1, wherein a test action of a current test step is carried out on reception of a test call generated by a next upper layer test step when a test action of said next upper layer test step succeeds.

6. The system as claimed in claim 1, wherein a test action of a current test step is carried out on reception of a test call

generated by one of a previous test step of the same current test sequence of the same current layer, preceding said current test step or

a previous test step of a different test sequence of the same current layer, when said previous test step of said different test sequence finishes said different test sequence.

7. The system as claimed in claim 1, wherein a test action of a current test step is carried out on reception of a test call generated by a next lower layer test step when a test action of said next lower layer test step succeeds and said next lower layer test step finishes a test sequence in said next lower layer.

8. The system as claimed in claim 1, comprising a memory for saving a test context for at least one of said layers.

9. The system as claimed in claim 1, comprising a representation unit for managing tests and evaluating test results of at least one of said plurality of test sequences.

10. A method for tree sequence testing of a device in a test framework architecture, comprising:

executing a plurality of test steps in a hierarchical layer order defined by a plurality of hierarchical layers at least comprising an upmost layer and a lowest layer; and

each of said plurality of hierarchical layers comprises at least one test sequence of at least two test steps comprising;

carrying out a test action on said device,

transmitting a recovery call to a next upper layer when said test action fails, and

executing a recovery action on reception of a recovery call from a next lower layer.

11. The method as claimed in claim 10, wherein said executing a recovery action by a next upper layer when a test action fails comprises recursively repeating said step until said recovery action succeeds.

12. The method as claimed in claim 10, wherein the step of executing a recovery action by a next upper layer when a test action fails comprises recursively passing on said recovery call to a next upper layer, when a failure classification indicates that a recovery action will not be successful for the current layer.

16. The method as claimed in claim 10 further comprising:

receiving a test call generated by a test step executed by a next upper layer; and

performing said test action on said device if the test call indicates that the test step executed by the next upper level succeeded.

17. The method as claimed in claim 10 further comprising:

receiving a test call, wherein the test call is generated by one of a previous test step of a current test sequence of the same hierarchical layer, and

a previous test step of a different test sequence of the same hierarchical layer when said previous test step finishes said different test sequence.

18. The method as claimed in claim 10 further comprising:

receiving a test call generated by a next lower hierarchical layer test step; and

performing said test action if the test call indicates that a test action of the next lower hierarchical layer succeeds and said next lower hierarchical layer test step finishes a test sequence in said next lower hierarchical layer.

19. The method as claimed in claim 10 further comprising storing a test context for at least one of the plurality of hierarchical layers.

13-15. -15. (canceled)

20. A computer readable storage medium storing instructions executable by a processor, the instructions configured to:

execute a plurality of test steps in a hierarchical layer order defined by a plurality of hierarchical layers, wherein the plurality of hierarchical layers comprises at least an upmost layer and a lowest layer; and

each of said plurality of hierarchical layers comprises instructions for at least one test sequence of at least two test steps comprising instructions configured to;

carry out a test action on said device,

transmit a recovery call to a next upper layer when said test action fails, and

execute a recovery action on reception of a recovery call from a next lower layer.