UNIAXIAL TENSILE STRAIN IN SEMICONDUCTOR DEVICES

• US 20120018704A1
• Filed: 04/12/2010
• Published: 01/26/2012
• Est. Priority Date: 04/14/2009
• Status: Abandoned Application

• Current Assignee: Qinetiq Limited (QinetiQ Group PLC)
• Original Assignee: Qinetiq Limited (QinetiQ Group PLC)
• Inventors: Wallis, David John, Jefferies, Richard
• Application Number:
  US13/263,621
• Publication Number:
  US 20120018704A1
• Time in Patent Office: Days
• US Class Current: 257/24
• CPC Class Codes: B82Y 10/00 Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• CPC Class Codes: H01L 29/045 by their particular orientation of crystalline planes
• CPC Class Codes: H01L 29/122 Single quantum well structures single heterojunctions, couples of materials H01L29/165, H01L29/205, H01L29/225, H01L29/267
• CPC Class Codes: H01L 29/205 in different semiconductor regions , e.g. heterojunctions
• CPC Class Codes: H01L 29/7784 with delta or planar doped donor layer H01L29/7785 takes precedence

Abstract

A semiconductor device structure comprises an active layer and a buffer layer. The active layer is a quantum well structure. There is a lattice mismatch between the buffer layer and the active layer which places the active layer under biaxial compressive strain. Uniaxial tensile strain is applied to the active layer to reduce compressive strain on the active layer in a second direction but not in a first direction. This favours hole and electron mobility in the first direction, rendering the semiconductor device structure suitable for the formation of both p-channel and n-channel devices.

Claims

1. A semiconductor device structure comprising:

an active layer comprising a quantum well structure;

a buffer layer underneath and adjacent to the active layer, wherein there is a lattice mismatch between the buffer layer and the active layer which places the active layer under biaxial compressive strain;

and means to apply uniaxial tensile strain to the active layer to reduce compressive strain on the active layer in a second direction but not in a first direction, the first direction and the second direction lying in a plane of the active layer.

2. Semiconductor device structure as claimed in claim 1, wherein a p-type device is formed in the semiconductor device structure, the p-type device having a p-channel oriented substantially in the first direction.

3. Semiconductor device structure as claimed in claim 2, wherein the p-type device is a p-FET.

4. Semiconductor device structure as claimed in claim 1, wherein an n-type device is formed in the semiconductor device structure, the n-type device having an n-channel oriented substantially in the first direction.

5. Semiconductor device structure as claimed in claim 4, wherein the n-type device is an n-FET.

6. Semiconductor device structure as claimed in claim 1, wherein the active layer is substantially unstrained in the second direction.

7. Semiconductor device structure as claimed in claim 1, wherein the active layer comprises an InSb quantum well structure.

8. Semiconductor device structure as claimed in claim 7, wherein the buffer layer is formed of Al_xIn_1-xSb.

9. Semiconductor device structure as claimed in claim 1, wherein the means to apply uniaxial tensile strain comprises means to bend the semiconductor device structure about an axis lying in the first direction.

10. Semiconductor device structure as claimed in claim 1, wherein the means to apply uniaxial tensile strain comprises means to stretch the semiconductor device structure in the second direction.

11. Semiconductor device structure as claimed in claim 9, wherein the semiconductor device structure is bonded to a base substrate before or after bending or stretching.

12. A semiconductor structure as claimed in claim 1, wherein the uniaxial tensile strain is applied orthogonal to the direction of current flow in the active layer.

19. Semiconductor device structure as claimed in claim 10, wherein the semiconductor device structure is bonded to a base substrate before or after bending or stretching.

13. A method of manufacturing a semiconductor device structure, comprising:

epitaxially growing a buffer layer on a substrate;

epitaxially growing a quantum well active layer on the substrate, wherein there is a lattice mismatch between the buffer layer and the active layer which places the active layer under biaxial compressive strain; and

applying uniaxial tensile strain to the active layer to reduce compressive strain on the active layer in a second direction but not in a first direction, the first direction and the second direction lying in a plane of the active layer.

14. A method as claimed in claim 13, wherein the step of applying uniaxial tensile strain to the active layer comprises applying uniaxial tensile strain to the semiconductor device structure as a whole.

15. A method as claimed in claim 14, wherein the step of applying uniaxial tensile strain comprises bending the semiconductor device structure about an axis lying in the first direction before or after bonding the semiconductor device structure to a base substrate.

16. A method as claimed in claim 14, wherein the step of applying uniaxial tensile strain comprises stretching the semiconductor device structure in the second direction before or after bonding the semiconductor device structure to a base substrate.

17-18. -18. (canceled)