A/D CONVERTER USING ISOLATION SWITCHES

• US 20120026027A1
• Filed: 07/27/2010
• Published: 02/02/2012
• Est. Priority Date: 07/27/2010
• Status: Active Grant

• Current Assignee: Analog Devices International Unlimited Company (Analog Devices, Inc.)
• Original Assignee: Linear Technology Corporation (Analog Devices, Inc.)
• Inventors: Steensgaard-Madsen, Jesper
• Granted Patent: US 8,130,133 B2
• Time in Patent Office: Days
• US Class Current: 341/161
• CPC Class Codes: H03M 1/466 using switched capacitors

Abstract

In an A/D converter, isolation switches are used between the capacitors and the conversion switches. The conversion switches are those switches used to selectively couple the plates of the binary weighted capacitors to either Vref or 0 volts during the A/D conversion process. During sampling of the input voltage signal, the isolation switches are opened to isolate the conversion switches from the wide range of possible input voltages at the bottom plates of the capacitors. Therefore, the voltage across the conversion switches is substantially limited to Vref. Hence, the conversion switches can be very fast low voltage switches. After sampling of the input voltage, when the sampled input voltage is locked in, the conversion switches operate normally to selectively connect the capacitor plates to either Vref or 0 volts for successively approximating the input voltage, whereby a digital code representing the sampled input voltage is generated.

Claims

1. An analog-to-digital converter comprising:

a plurality of capacitors;

a first sampling switch connected to selectively couple a first capacitor in the plurality of capacitors to an input voltage signal during a sampling operation;

a plurality of conversion switches connected to selectively apply a plurality of reference voltage potentials to individual capacitors within the plurality of capacitors during a conversion operation;

a first isolation switch coupled between the first capacitor and a first conversion switch in the plurality of conversion switches; and

a controller configured to control the first isolation switch such that the first conversion switch is substantially isolated from the input voltage signal during the sampling operation, the controller further configured to selectively control the plurality of conversion switches during the conversion operation to derive a digital code corresponding to a sampled value of the input voltage signal.

2. The analog-to-digital converter of claim 1 wherein a full-scale input voltage signal range exceeds a reference voltage range delimited by a first reference voltage potential and a second reference voltage potential.

3. The analog-to-digital converter of claim 1 further comprising:

a first plurality of sampling switches, including the first sampling switch, to selectively couple a first set of capacitors in the plurality of capacitors, including the first capacitor, to the input voltage signal during the sampling operation;

a first plurality of isolation switches, including the first isolation switch, coupled between the first set of capacitors in the plurality of capacitors and the plurality of conversion switches;

wherein the controller is configured to control the first plurality of isolation switches such that the conversion switches are substantially isolated from the input voltage signal during the sampling operation.

4. The analog-to-digital converter of claim 1 wherein the first conversion switch has a reliability voltage limit that is less than a width of a full-scale range of the analog-to-digital converter.

5. The analog-to-digital converter of claim 1 wherein the first isolation switch is substantially conductive throughout the conversion operation.

6. The analog-to-digital converter of claim 1 wherein the digital code is derived using a successive-approximation algorithm.

7. The analog-to-digital converter of claim 1 wherein the first sampling switch has at least two terminals, wherein a terminal-to-terminal voltage for the first sampling switch is substantially non-zero and independent of the input voltage signal during the sampling operation.

8. The analog-to-digital converter of claim 1 wherein the first sampling switch is a bootstrapped switch.

9. The analog-to-digital converter of claim 1 wherein the first sampling switch comprises an asymmetrical transistor device.

10. The analog-to-digital converter of claim 1 wherein the first isolation switch is a bootstrapped switch.

11. The analog-to-digital converter of claim 10 wherein the first isolation switch comprises an asymmetrical transistor device.

12. The analog-to-digital converter of claim 1 wherein the first sampling switch comprises a transistor device having a first gate oxide thickness, and the plurality of conversion switches comprises transistors having a gate oxide that is substantially thinner than the first gate oxide thickness.

13. The analog-to-digital converter of claim 12 wherein the first isolation switch comprises a transistor device having substantially the first gate oxide thickness.

14. A signal-processing circuit receiving an analog input signal within a full-scale input voltage range characterized by a lower input voltage limit and an upper input voltage limit, the signal-processing circuit comprising:

a first circuit that processes signals only within a first voltage range that is substantially less wide than the full-scale input voltage range;

a capacitor having a first capacitor terminal and a second capacitor terminal;

an input switch selectively coupling the analog input signal to the first capacitor terminal; and

an isolation switch selectively coupling the first circuit to the first capacitor terminal,

wherein the input switch is substantially conductive and the isolation switch is substantially non-conductive during a sampling operation, and the isolation switch is substantially conductive and the input switch is substantially non-conductive during a signal-processing operation.

15. The signal-processing circuit of claim 14 wherein the first circuit is used to derive a numerical representation of a sampled value of the analog input signal.

16. The signal-processing circuit of claim 14 wherein the analog input signal is selectively connectable to a plurality of subsets of a plurality of input capacitors, whereby any of a plurality of full-scale input voltage ranges is selectable.

17. The signal-processing circuit of claim 16, wherein the full-scale input voltage range is programmable.

18. The signal-processing circuit of claim 14 wherein the first terminal of the first capacitor is switched selectively between a first reference potential and a second reference potential during the signal-processing operation.

19. The signal-processing circuit of claim 14 wherein the input switch comprises an asymmetrical transistor device.

20. The signal-processing circuit of claim 19 wherein the input switch is a bootstrapped switch.