TOP GATE THIN FILM TRANSISTOR AND DISPLAY APPARATUS INCLUDING THE SAME

• US 20120032173A1
• Filed: 07/21/2011
• Published: 02/09/2012
• Est. Priority Date: 08/03/2010
• Status: Active Grant

• Current Assignee: Canon Ayutthaya Limited (Canon Inc.)
• Original Assignee: Canon Ayutthaya Limited (Canon Inc.)
• Inventors: Sato, Ayumu, Kumomi, Hideya, Yabuta, Hisato, Hayashi, Ryo, Takai, Yasuyoshi
• Granted Patent: US 8,624,240 B2
• Time in Patent Office: Days
• US Class Current: 257/59
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78618 characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 29/78648 arranged on opposing sides of the channel
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

Provided is a top gate thin film transistor, including on a substrate: a source electrode layer; a drain electrode layer; an oxide semiconductor layer; a gate insulating layer; a gate electrode layer including an amorphous oxide semiconductor containing at least one kind of element selected from among In, Ga, Zn, and Sn; and a protective layer containing hydrogen, in which: the gate insulating layer is formed on a channel region of the oxide semiconductor layer; the gate electrode layer is formed on the gate insulating layer; and the protective layer is formed on the gate electrode layer.

Claims

1. A top gate thin film transistor, comprising on a substrate:

a source electrode layer;

a drain electrode layer;

an oxide semiconductor layer;

a gate insulating layer;

a gate electrode layer including an amorphous oxide semiconductor containing at least one kind of element selected from among In, Ga, Zn, and Sn; and

a protective layer containing hydrogen, wherein;

the gate insulating layer is formed on a channel region of the oxide semiconductor layer;

the gate electrode layer is formed on the gate insulating layer; and

the protective layer is formed on the gate electrode layer.

2. The top gate thin film transistor according to claim 1, wherein the source electrode layer, the drain electrode layer, and the channel region are formed in the same oxide semiconductor layer.

3. The top gate thin film transistor according to claim 1, wherein the oxide semiconductor layer is formed of an amorphous oxide semiconductor.

4. A display apparatus, comprising:

the top gate thin film transistor according to claim 1; and

a display device,

wherein the display device is electrically connected to one of a source electrode layer and a drain electrode layer of the top gate thin film transistor.