MOTHERBOARD WITH UNIVERSAL SERIES BUS CONNECTOR

• US 20120033369A1
• Filed: 07/28/2011
• Published: 02/09/2012
• Est. Priority Date: 08/06/2010
• Status: Abandoned Application

• Current Assignee: ASUSTek Computer, Inc.
• Original Assignee: ASUSTek Computer, Inc.
• Inventors: Wu, Li-Chien, Huang, Pai-Ching
• Application Number:
  US13/192,485
• Publication Number:
  US 20120033369A1
• Time in Patent Office: Days
• US Class Current: 361/679.4
• CPC Class Codes: H01R 12/57 surface mounting terminals
• CPC Class Codes: H01R 12/716 Coupling device provided on the PCB
• CPC Class Codes: H01R 13/6473 Impedance matching

Abstract

A motherboard including a bus connector and a printed circuit board (PCB) is provided. The bus connector includes a plurality of pins, and each of the pins further includes a first end and a second end. The PCB includes a plurality of contact pads. The second ends of the pins are electrically connected to the contact pads of the PCB via a surface mounted technology (SMT), respectively.

Claims

1. A motherboard, comprising:

a bus connector including a plurality of pins, wherein each of the pins includes a first end and a second end; and

a printed circuit board (PCB) including a plurality of contact pads;

wherein the second ends of the pins of the bus connector are electrically connected to the contact pads of the PCB via a surface mounted technology (SMT).

2. The motherboard according to claim 1, wherein the pins of the bus connector includes a first input/output (I/O) interface connector pins and a second I/O interface connector pins.

3. The motherboard according to claim 2, wherein the first I/O interface connector pins includes a third pin P1_D+, a fifth pin P1_D−

, a seventh pins GND, a ninth pin P1_TX+, a eleventh pin P1_TX−

, a thirteenth pin GND, a fifteenth pin P1_RX+, a seventeenth pin P1_RX− and

a nineteenth pin VCC.

4. The motherboard according to claim 3, wherein the third pin P1_D+ and the fifth pin P1_D−

are used for signal transmission of a first I/O interface, the ninth pin P1_TX+ and the eleventh pin P1_TX−

are used for signal output of a second I/O interface, the fifteenth pin P1_RX+ and the seventeenth pin P1_RX−

are used for signal input of the second I/O interface, the seventh pin GND and the thirteenth pin GND are connected to ground, and the nineteenth pin VCC is connected to a direct current (DC) power.

5. The motherboard according to claim 2, wherein the second I/O interface connector pins includes a second pin P2_D+, a fourth pin P2_D−

, a sixth pin GND, an eighth pin P2_TX+, a tenth pin P2_TX−

, a twelfth pin GND, a fourteenth pin P2_RX+, a sixteenth pin P2_RX− and

an eighteenth pin VCC.

6. The motherboard according to claim 5, wherein the second pin P2_D+ and the fourth pin P2_D−

are used for signal transmission of a first I/O interface, the eighth pin P2_TX+ and the tenth pin P2_TX−

are used for signal output of a second I/O interface, the fourteenth pin P2_RX+ and the sixteenth pin P2_RX−

are used for signal input of the second I/O interface, the sixth pin GND and the twelfth pin GND are connected to ground, and the eighteenth pin VCC is connected to a DC power.

7. The motherboard according to claim 1, wherein the pins of the bus connector includes a first pin OCP for over-current protection.

8. The motherboard according to claim 1, wherein the bus connector includes a fool-proof structure.

9. The motherboard according to claim 1, wherein the first ends of the pins is electrically connected to a transmission line plug.