SYSTEMS AND METHODS FOR RECEIVE AND TRANSMISSION QUEUE PROCESSING IN A MULTI-CORE ARCHITECTURE

• US 20120033680A1
• Filed: 08/11/2011
• Published: 02/09/2012
• Est. Priority Date: 06/22/2009
• Status: Active Grant

• Current Assignee: Citrix Systems, Inc. (Cloud Software Group)
• Original Assignee: Citrix Systems, Inc. (Cloud Software Group)
• Inventors: Gopinath, Sandhya, Bots, Henk
• Granted Patent: US 9,112,819 B2
• Time in Patent Office: Days
• US Class Current: 370/412
• CPC Class Codes: H04L 49/901 using storage descriptor, e.g. read or write pointers
• CPC Class Codes: H04L 49/9047 including multiple buffers, e.g. buffer pools
• CPC Class Codes: H04L 49/9057 Arrangements for supporting packet reassembly or resequencing

Abstract

Described herein is a method and system for directing outgoing data packets from packet engines to a transmit queue of a NIC in a multi-core system, and a method and system for directing incoming data packets from a receive queue of the NIC to the packet engines. Packet engines store outgoing traffic in logical transmit queues in the packet engines. An interface module obtains the outgoing traffic and stores it in a transmit queue of the NIC, after which the NIC transmits the traffic from the multi-core system over a network. The NIC receives incoming traffic and stores it in a NIC receive queue. The interface module obtains the incoming traffic and applies a hash to a tuple of each obtained data packet. The interface module then stores each data packet in the logical receive queue of a packet engine on the core identified by the result of the hash.

Claims

1. A method for processing packets transmitted via a multi-core device, the method comprising:

(a) storing, by a first core of a device intermediary to one or more senders and one or more receivers, a first packet received from the one or more senders to a first logical transmit queue of the first core, the device comprising a plurality of cores,

(b) storing, by a second core of the plurality of cores of the device, a second packet received from the one or more senders to a second logical transmit queue of the second core; and

(c) forwarding, by a core of the plurality of cores of the device, to a transmit queue of a network interface card (NIC) of the device for transmission to a receiver of the one or more receives, the first packet from the first logical queue and the second packet from the second logical queue.

2. The method of claim 1, wherein step (c) further comprising forwarding, by an interface module executing on the core of the device, the first packet and the second packet to the transmit queue of the NIC

3. The method of claim 1, wherein step (c) further comprising forwarding, by a flow distributor executing on the core, the first packet and the second packet to the transmit queue of the NIC

4. The method of claim 1, wherein step (c) further comprising storing, by the core, the first packet and the second packet to the transmit queue of the NIC.

5. The method of claim 1, wherein step (c) further comprises selecting the NIC from a plurality of NICs of the device.

6. The method of claim 1, further comprising transmitting, by the NIC, one of the first packet or the second packet to the receiver.

11. The device of claim 1, wherein the core stores the first packet and the second packet to the transmit queue of the NIC of the one or more NICs.

12. The device of claim 1, wherein the core selects the NIC from the one or more NICs of the device.

13. The device of claim 1, wherein the NIC transmits one of the first packet or the second packet to the receiver

7. A device for transmitting packets via a plurality of cores of the device, the device comprising:

a plurality of cores;

one or more network interface cards intermediary to one or more senders and one or more receivers;

a first core of the plurality of cores storing a first packet received from the one or more senders to a first logical transmit queue of the first core;

a second core of the plurality of cores storing a second packet received from the one or more senders, to a second logical transmit queue of the second core; and

a module executing on the device forwarding to a transmit queue of a network interface card (NIC) of the one or more NICS for transmission to a receiver of the one or more receivers, the first packet from the first logical queue and the second packet from the second logical queue.

8. The device of claim 7, wherein the module comprises a flow distributor.

9. The device of claim 7, wherein the module comprises an interface module.

10. The device of claim 7, wherein the module executes on a core of the plurality of cores.

14. A method for processing packets received via a multi-core device, the method comprising:

(a) storing, by a network interface card (NIC) of a device, a plurality of packets received in a receive queue of the NIC, the device comprising a plurality of cores;

(b) determining, by a flow distributor executing on the device, that a packet of the plurality of packets stored in the receive queue identifies a first core of the plurality of cores based on a hash of a tuple of the packet; and

(c) forwarding, by the flow distributor responsive to the determination, the packet to a first logical queue of the first core.

15. The method of claim 14, wherein step (a) further comprises storing, by the NIC, the plurality of packets into memory allocated for the receive queue.

16. The method of claim 14, wherein step (b) further comprises computing, by the flow distributor, the hash of the tuple comprising a source internet protocol address and a source port.

17. The method of claim 14, wherein step (b) further comprises computing, by the flow distributor, the hash of the tuple comprising a destination internet protocol address and a destination port.

18. The method of claim 14, wherein step (c) further comprises storing, by the flow distributor, the packet to the first logical queue.

19. A device for processing packets via a plurality of cores of the device, the device comprising:

a plurality of cores;

one or more network interface cards;

a network interface card (NIC) of the one or more NICs storing a plurality of packets received in a receive queue of the NIC; and

a flow distributor determining that a packet of the plurality of packets stored in the receive queue identifies a first core of the plurality of cores based on a hash of a tuple of the packet and responsive to the determination forwards the packet to a first logical queue of the first core.

20. The device of claim 19, wherein the NIC, stores the plurality of packets into memory allocated for the receive queue.

21. The device of claim 19, wherein the tuple comprises a source internet protocol address and a source port.

22. The device of claim 19, wherein the tuple comprises a destination internet protocol address and a destination port.

23. The device of claim 19, wherein the flow distributor stores the packet to the first logical queue.