INTERCONNECT THAT ELIMINATES ROUTING CONGESTION AND MANAGES SIMULTANEOUS TRANSACTIONS
First Claim
1. An integrated circuit having multiple initiator IP cores and multiple target IP cores that communicate request transactions over an interconnect, where the interconnect provides a shared communications bus between the multiple initiator IP cores and multiple target IP cores, comprising:
- flow control logic for the interconnect is configured to apply a flow control splitting protocol to permit transactions from a first initiator thread or a first initiator tag stream to be outstanding to multiple channels in a single aggregate target at once, and therefore to multiple individual target IP cores within the aggregate target at once, where the combination of the flow control logic and the flow control splitting protocol allows the interconnect to manage simultaneous requests to multiple channels in the aggregate target from the same first initiator thread or the first initiator tag at the same time.
2 Assignments
0 Petitions
Accused Products
Abstract
A method, apparatus, and system are described, which generally relate to an integrated circuit having an interconnect. The flow control logic for the interconnect applies a flow control splitting protocol to permit transactions from each initiator thread and/or each initiator tag stream to be outstanding to multiple channels in a single aggregate target at once, and therefore to multiple individual targets within an aggregate target at once. The combined flow control logic and flow control protocol allows the interconnect to manage simultaneous requests to multiple channels in an aggregate target from the same thread or tag at the same time.
-
Citations
18 Claims
-
1. An integrated circuit having multiple initiator IP cores and multiple target IP cores that communicate request transactions over an interconnect, where the interconnect provides a shared communications bus between the multiple initiator IP cores and multiple target IP cores, comprising:
flow control logic for the interconnect is configured to apply a flow control splitting protocol to permit transactions from a first initiator thread or a first initiator tag stream to be outstanding to multiple channels in a single aggregate target at once, and therefore to multiple individual target IP cores within the aggregate target at once, where the combination of the flow control logic and the flow control splitting protocol allows the interconnect to manage simultaneous requests to multiple channels in the aggregate target from the same first initiator thread or the first initiator tag at the same time. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17)
-
18. A method of communicating requests over an interconnect in an integrated circuit having multiple initiator IP cores and multiple target IP cores, where the interconnect provides a shared communications bus between the multiple initiator IP cores and multiple target IP cores, comprising:
applying a flow control splitting protocol to permit transactions from one initiator thread or one initiator tag stream to be outstanding to multiple channels in a single aggregate target at once, and therefore to multiple individual target IP cores within the aggregate target at once, where the combined flow control logic and flow control protocol allows the interconnect to manage simultaneous requests to multiple channels in the aggregate target from a same thread or tag at the same time.
Specification