Conditional Access Integration in a SOC for Mobile TV Applications

• US 20120036372A1
• Filed: 02/04/2011
• Published: 02/09/2012
• Est. Priority Date: 02/05/2010
• Status: Active Grant

• Current Assignee: Radioxio, LLC
• Original Assignee: Maxlinear Incorporated
• Inventors: Leclercq, Maxime
• Granted Patent: US 9,219,936 B2
• Time in Patent Office: Days
• US Class Current: 713/192
• CPC Class Codes: H04N 21/418 External card to be used in combination with the client device, e.g. for conditional access
• CPC Class Codes: H04N 21/4181 for conditional access
• CPC Class Codes: H04N 21/4183 providing its own processing capabilities, e.g. external module for video decoding

Abstract

An integrated circuit (IC) includes a demodulator for receiving encrypted information data and a hardware unit that enables conditional access to the information data. The hardware unit includes a processing unit, a RAM, a ROM, multiple non-volatile registers, and an interface unit for transferring an attribute to the demodulator. The non-volatile registers may include an IC identification and an encryption key. In an embodiment, the ROM includes a boot code that causes the processing unit to fetch a code from an external memory and store the fetched code in the RAM. The fetched code may include a certificate that ensures the authenticity of the code. The fetched code may be encrypted and decrypted by the ROM using the IC identification and the encryption key. The demodulator includes a descrambler for decrypting the received information data using the attribute. The information data may include digital radio or television content.

Claims

1. An integrated circuit for receiving information data comprising:

a demodulator for decoding the received information data; and

a hardware unit communicatively coupled to the demodulator and being adapted to enable conditional access to the received information data, the hardware unit comprising;

a processing unit;

a random access memory;

a read-only access memory;

a plurality of non-volatile registers or fuses; and

an interface unit coupled to the demodulator and being adapted to transfer an attribute to the demodulator.

2. The integrated circuit of claim 1, wherein at least one of the plurality of non-volatile registers or fuses comprises an identification code of the integrated circuit.

3. The integrated circuit of claim 1, wherein at least one of the plurality of non-volatile registers or fuses comprises an encryption key.

4. The integrated circuit of claim 1, wherein the read-only memory comprises a boot code causing the integrated circuit to fetch a conditional access code from an external memory.

5. The integrated circuit of claim 4, wherein the fetched conditional access code is transferred to the random access memory disposed in the hardware unit.

6. The integrated circuit of claim 4, wherein the fetched conditional access code comprises a certificate that is authenticated by the hardware unit using information stored in the plurality of non-volatile registers or fuse banks.

7. The integrated circuit of claim 4, wherein the fetched conditional access code is encrypted.

8. The integrated circuit of claim 7, wherein the read-only memory deciphers the encrypted fetched conditional access code using a key stored in the plurality of non-volatile registers or fuses.

9. The integrated circuit of claim 1 further comprising a memory interface port adapted to receive an external memory.

10. The integrated circuit of claim 1 further comprising a crypto processor configured to provide tamper resistance to the integrated circuit.

11. A device for use in a conditional access system, the receiver comprising:

a receiver module for receiving encrypted information data; and

a hardware unit communicatively coupled to the receiver module and being adapted to grant conditional access to the received information data, the hardware unit comprising;

a processing unit;

a random access memory coupled to the processing unit;

a read-only access memory coupled to the processing unit;

a plurality of non-volatile registers or fuses; and

an interface unit adapted to transfer an attribute to the receiver module.

12. The device of claim 11, wherein the receiver module and the hardware unit are integrated together in a single CMOS integrated circuit.

13. The device of claim 11, wherein the receiver module decrypts the received information data using the attribute.

14. The device of claim 11 further comprising a memory interface port adapted to receive an external memory.

15. The device of claim 14, wherein the receiver module receives a conditional access code from the external memory and transfers the access code to the random access memory disposed in the hardware unit.

16. The device of claim 11 further comprising a crypto processor configured to provide tamper resistance to the device.

17. The device of claim 11, wherein the read-only memory comprises a boot code which causes the processing unit to fetch a conditional access code from an external memory.

18. The device of claim 17, the fetched conditional access code is encrypted and deciphered by the processing unit disposed in the hardware unit.

19. The device of claim 17, the fetched conditional access code is stored in the random access memory.

20. The device of claim 17, the fetched conditional access code comprises a certificate that is authenticated by the hardware unit using information stored in the plurality of non-volatile registers or fuses.

21. The device of claim 20, wherein the information stored in the plurality of non-volatile registers or fuses comprises an identity code of the device and a certificate key.

22. The device of claim 11, wherein the receiver module comprises a descrambler circuit adapted to decrypt the received information data using the attribute.

23. The device of claim 11, wherein the received information data comprises broadcast digital radio or digital television content.